vcu118 verilog genration failed in chipyard repository about chipyard HOT 3 OPEN

It looks like your fpga-shells module was not initalized because none of the code from fpga-shells compiled. Did you run the init-fpga script?

https://chipyard.readthedocs.io/en/stable/Prototyping/General.html#sources-and-submodule-setup

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@michael-etzkorn Michael, Do you mind taking a look at my post in chipyard maillist? https://groups.google.com/g/chipyard/c/udqI1C0yU8k I want to create a baremetal workload for my vcu118 design. But I have no idea if FireMarshal is needed? Thanks

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@michael-etzkorn ,
Yaa, I forgot this. but now I did what you said but it is showing me error .
I have source the environment already before running make command.

/chipyard/generators/nvdla/nvdla.mk: No such file or directory
make: *** No rule to make target '/home/ashutosh/chipyard/generators/nvdla/nvdla.mk'.  Stop.

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