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noahgaertner avatar noahgaertner commented on July 24, 2024

It doesn't appear to be a config bug, the same behavior exists in MulticlockRocketConfig - also have confirmed it does not exist in 1.8.1, so we're rolling back to that release for our chip, but I can help debug/isolate the issue if neccesary.

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jerryz123 avatar jerryz123 commented on July 24, 2024

Reorder the WithAsynchonousRocketTiles above the WithNMedCores in your config

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jerryz123 avatar jerryz123 commented on July 24, 2024

For context, the WithXRocketTiles now modifies a local parameter for the tile, rather than global parameters, so those fragments must be added after tiles params are added

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jerryz123 avatar jerryz123 commented on July 24, 2024

FYI those reported frequencies are only used by the fake "clock approximator" divideronlyclockgenerator used for RTL sim/FireSim. They otherwise have no bearing on the physical implementation of the chip, in which you'll need to integrate a PLL or a clock receiver.

#1427 resolves this issue, and also provides a demo ChipLikeRocketConfig to show how a tapeout-ready config might appear.

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noahgaertner avatar noahgaertner commented on July 24, 2024

issue fixed by reordering config.

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