DWARF register mappings about riscv-elf-psabi-doc HOT 8 CLOSED

We don't have an official gdb port yet, so these numbers probably aren't finalized yet.

GCC uses 0-31 for the integer registers, 32-63 for the FP registers, and then 64 is the alternate return address column used for the return address in signal handlers. GCC does not support CSRs. GDB uses 0-31 for the integer registers, 32 for the pc, 33-64 for the FP registers, and 65+ are CSRs, e.g. ustatus is 65.

That leads to the obvious question of how can this work if gcc and gdb are using different numbers for FP registers. I don't know if it does, but I don't have any easy way to check. The gdb port I'm looking at is not the one that was just submitted upstream a couple of days ago though, so it is possible that gdb may have been changed already, and this might have been fixed already. If gdb isn't already fixed, and if this isn't already working some how, then at some point we will have to change gcc and/or gdb to make this work.

So you should not make any assumptions at this time as to what the dwarf register mapping is.

from riscv-elf-psabi-doc.

Isn't the DWARF register mapping already baked into the ABI because of C++ exception handling?

from riscv-elf-psabi-doc.

Yes, changing gcc would cause a lot more trouble than changing gdb, because changing gcc would break stuff like C++ exception handling.

from riscv-elf-psabi-doc.

OK, so given that the register mapping in GCC is already part of the C++ ABI, using that in Mono sounds reasonable enough, at least until things stabilize.

By the way, could you point me to the relevant GCC/GDB sources that define those register mappings for RISC-V?

from riscv-elf-psabi-doc.

from riscv-elf-psabi-doc.

Perfect, thank you!

from riscv-elf-psabi-doc.

GDB defines an enum in riscv-tdep.h.
/* RiscV DWARF register numbers. */
enum
{
RISCV_DWARF_REGNUM_X0 = 0,
RISCV_DWARF_REGNUM_X31 = 31,
RISCV_DWARF_REGNUM_F0 = 32,
RISCV_DWARF_REGNUM_F31 = 63,
};
and in riscv-tdep.c has a function riscv_dwarf_reg_to_regnum that does the conversion from dwarf register numbers to gdb internal register numbers, though for now these happen to be the same numbers.

from riscv-elf-psabi-doc.

Fixed.

from riscv-elf-psabi-doc.