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aswaterman avatar aswaterman commented on July 4, 2024

My sense is that this will be slightly preferable for most code, but there is risk that instruction-count increase in less-common cases will outweigh the benefits. Especially since this ABI decision would differ from x86 x32, I'd advise against doing it without quantitative justification. If you do SPEC CPU runs with both ABI designs, you'll see whether the perf boost from reduced D$ miss rate on some programs is outweighed by the instruction-count increase for 64b values that are live across calls.

from riscv-elf-psabi-doc.

kito-cheng avatar kito-cheng commented on July 4, 2024

That kind of become no real callee-save register, one concern from me is that's relative easy for compiler, but it's hard to maintain and debug for assembly code, and seems this rely on an assumption is the HW/MMU will ignore highest 32-bit address otherwise ra and sp might got trouble.

Also here is a big question from me is: the main advantage of ilp32/rv64 is we can have native 64 bit operation, so that can be faster than ilp32/rv32, and this design seems will impact the performance for 64 bit operations, so I feel that contradicts, why not just using ilp32/rv32?

Of cause here is always an option is having both ABI flavor ilp32/RV64 for ordinary ABI and ilp32x/rv64 as this proposal, but before having more data and evidence to prove it's really worth we maintain such new ABI variant, I would prefer sticking to the ordinary ilp32/RV64 ABI.

So let having some benchmark data, like SPEC CPU AND EEMBC since SPEC CPU score might not representative for embedded world.

from riscv-elf-psabi-doc.

guoren83 avatar guoren83 commented on July 4, 2024

from riscv-elf-psabi-doc.

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