Comments (8)
How about t0
or t1
? Then we could change Linux as well, and it'd be slightly cleaner to not have the call selector stepping on one of the argument registers.
We would still need to define what the calling convention is on RV32E. There are tradeoffs that happen differently with just 15 registers…
from riscv-elf-psabi-doc.
From the manual: "The privileged architecture of an RV32E system can include user mode as well as machine mode, and the Mbare, Mbb, and Mbbid memory management schemes described in Volume II."
RV32E is meant for embedded systems that don't host an OS, so the choice of a7 doesn't matter. If you can afford the primary and secondary storage necessary to host Linux, you can afford the additional 16 registers (and probably will get better energy per operation from having them). My preference is to take no action on this matter.
If we did take action, a5 would not be ideal, since mmap takes 6 args and so already uses a5. t0 is probably fine.
from riscv-elf-psabi-doc.
Humm, so we will implement that in t0
for newlib and gdb sim.
@sorear RV32E seem only 3 callee save register(and 1 for $sp), do you think need to make it more balance?
from riscv-elf-psabi-doc.
@kito-cheng I have absolutely no idea. Build SPEC with various ratios of caller to callee saves and pick whichever one minimizes code size?
from riscv-elf-psabi-doc.
My work on RVC resulted in x8-15 being s0-1 and a0-5. Point being, having RVC target 2 saved and 6 argument registers minimized code size, moreso than 3 saved and 5 argument, for example. So I'd leave it as-is.
Also, we want the register map for RV32E to match RV32I if at all possible to minimize confusion.
from riscv-elf-psabi-doc.
Just noting that the PLT header and stubs use t3
for shared library calls. I wonder if the stubs can be reworked to use t0
through t2
. This is a separate issue to the syscall ABI.
from riscv-elf-psabi-doc.
I highly doubt dynamic linking will be popular on RV32E systems, but yeah, it looks possible.
from riscv-elf-psabi-doc.
It should be target / OS specific things, so I think we are not going to document on psABI.
from riscv-elf-psabi-doc.
Related Issues (20)
- Question on calculation for HI20 HOT 2
- Question on calculation for HI20 HOT 1
- Clarification of rules for flattening structs containing arrays of empty records HOT 3
- Specify relocation overflow checks HOT 1
- Specify a platform reserved register HOT 20
- Should calling convention also define ptrdiff_t? HOT 1
- Should we use lw/sw in push pop when we used ILP32, whether it's RV32 or RV64 HOT 3
- Operation semantics of __bf16 datatype HOT 2
- representation of GNU C fixed-size vectors HOT 4
- Deprecate R_RISCV_RVC_LUI? HOT 4
- Define GOT-Relative data relocation HOT 8
- Embedding R_RISCV_RELAX to another relocations HOT 7
- Define gp(x3) as global VLENB HOT 4
- Bitfield integer calling convention garbled
- Calling convention uses RV64GQ without definition or reference HOT 3
- Calling convention description of va_list et al. are unclear HOT 2
- Interpretation of floating-point types
- Linux ABI for Pointer Masking HOT 19
- New ABI for stack layout and frame pointer scheme HOT 4
- Change branch from "master" to "main" HOT 1
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from riscv-elf-psabi-doc.