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i2c_vip's Issues

no rtl

where is the design file. Attach the design file

TB Arch

I checked on the TB arch doc and I have few points to make:

  1. There is no DUT in this project
  2. The write and read agents are inappropriate here. The master can be either in transmit mode(write) or in receive mode(read). Ideally, it should be the master agent and slave agent connected back-to-back

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