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tf-approximate

Approximate layers - TensorFlow extension

tg-nexus-trace

RISC-V Nexus Trace TG documentation and reference code

timeloop

tiny-dnn

header only, dependency-free deep learning framework in C++14

tiny-yolo-3

Google Colab Notebook for creating and testing a Tiny Yolo 3 real-time object detection model.

tinyengine

[NeurIPS 2020] MCUNet: Tiny Deep Learning on IoT Devices; [NeurIPS 2021] MCUNetV2: Memory-Efficient Patch-based Inference for Tiny Deep Learning; [NeurIPS 2022] MCUNetV3: On-Device Training Under 256KB Memory

tinyml

tinyml-papers-and-projects

This is a list of interesting papers and projects about TinyML.

tinyml-zybo

This repository is a collection of designs invloving FPGAs and AI technologies.

tinyml_colabs

This repository holds the Google Colabs for the EdX TinyML Specialization

tinyml_courseware

In this repository you will find TinyML course syllabi, assignments/labs, code walkthroughs, links to student projects, and lecture videos (where applicable).

tinyriscv_arty_100t

tinyriscv for arty a7 100t

tinytpu

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

topoopt

[NSDI 2023] TopoOpt: Optimizing the Network Topology for Distributed DNN Training

torch-approx

GPU-accelerated Neural Network layers using Approximate Multiplications for PyTorch

torchmpi

Implements a message passing interface (MPI) wrapper that makes it easy to do massively parallel computations inside the Torch deep-learning framework.

torchview

torchview: visualize pytorch models

tptpu-sim

A Toy-Purpose TPU Simulator

tpzsimul

Automatically exported from code.google.com/p/tpzsimul

traffic-matrix-prediction

Code for ISSCC2019 paper《Traffic Matrix Prediction Based on Deep Learning for Dynamic Traffic Engineering》

training-bottleneck

Analyze network performance in distributed training

transfomers-silicon-research

Research and Materials on Hardware implementation of Transformer Model

tvm

Open deep learning compiler stack for cpu, gpu and specialized accelerators

tvm-custom-datatypes-notebook-example

tvm_tutorial

A self-contained version of the tutorial which can be easily cloned and viewed by others.

typing_speed_test

uart-soc

RTL Implementation of UART Protocol

usystolic-sim

A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.

uvm_alu_sequence

verible

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server