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resources-cohort2-ppt

This is the repository for all AI6 Lagos classes course materials basic info tensor etc

risc-v-cpu

RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.

risc-v-pathplanner

Implementing a RISC-V CPU in Verilog that can run the Path Planning Algorithm

risc-v-tensorcore

Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra

riscv

RISC-V CPU Core (RV32IM)

riscv-core-with-approximate-arithmetic-circuits

GeAr low latency adder implementation and error analysis

riscv-dnn

A small DNN library for RISC-V, using RISC-V Vector and Matrix extensions

riscv_formal_verification

Formal Verification of RISC V IM Processor

roofline_plot

Simple Roofline Plotting

rose

A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robotic system.

rv32-apx

32 Bits RISC-V Processor with Approximate Functions

sa

Systolic Array

scale-sim

scale-sim-v2

Repository to host and maintain scale-sim-v2 code

schoolmips

CPU microarchitecture, step by step

scraping_corona_news

sensai

sensAI: ConvNets Decomposition via Class Parallelism for Fast Inference on Live Data

serpens

Serpens is an HBM FPGA accelerator for SpMV

sextans

An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).

shaktimaan

SHAKTI Multiply-And-Accumulate Accelerator Network (SHAKTIMAAN), IITM's Deep Learning accelerator effort

shiftaddnet

[NeurIPS 2020] ShiftAddNet: A Hardware-Inspired Deep Network

sigma

RTL implementation of Flex-DPE.

skywater-pdk-sky130-raw-data

Raw data collected about the SKY130 process technology.

smaug

SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin

smile

snn-fpga

Spiking Neural Network RTL Implementation

soc_cnn

Convolutional Neural Network Implemented in Verilog for System on Chip

sofa

SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA

softmax

Verilog implementation of Softmax function

soomrv-arty

SoomRV on the Arty A7 100T FPGA dev board