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opentpu

A open source reimplementation of Google's Tensor Processing Unit (TPU).

optimsoc

OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores

paas_v1.0

PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems

paleo

An analytical performance modeling tool for deep neural networks.

parallel-prefix-adder

Parallel Prefix Adders achieve logarithmic time complexity by means of parallelizing the operation. For an n bit prefix adder, the critical path is one xor gate, one and/or gate and log(n) modules.

parallelizing-cnns

One weird trick for parallelizing convolutional neural networks

pathplanning

Common used path planning algorithms with animations.

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

piecewise_linear_approximation_verilog

pipelinec

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

pipelined-alu

Pipelined ALU RTL Implementation based on ARM7 ISA

pipelinedarm

💎 A 32-bit ARM Processor Implementation in Verilog HDL

plct-open-reports

PLCT实验室的公开演讲，或者决定公开的组内报告

portfolio_v1

power_bi_work

precision-vs-accuracy-for-af

projecteulersolutionshackerrank

Project Euler Solutions Hackerrank

proton

psma-benchmark

Benchmark fo state-of-the-art Precision Scalable MAC Arrays (PSMAs)

pydtnn

PyDTNN - Python Distributed Training of Neural Networks

pymtl3-net

Project repo for the POSH on-chip network generator

python

All Algorithms implemented in Python

python_password_checker

python_single_liners

pytoolkitboolexp

a Pythonic toolkit for working with Boolean expressions

pytorch-weight-pruning

A PyTorch implementation of "Learning both Weights and Connections for Efficient Neural Networks", Song Han et al. 2015.

pytorchmemtracer

Depict GPU memory footprint during DNN training of PyTorch

rapid-design-methods-for-developing-hardware-accelerators

raven-picorv32

Silicon-validated SoC implementation of the PicoSoc/PicoRV32

rerocc