Comments (8)
Woops, excellent catch, thanks. Let me update the READMEs and then get back to your question :)
from koika.
Maybe replacing this duplication with a redirection to the "FPGA" section of the main README would be clearer.
Done, thanks again
I am in fact interested in demonstrating some properties of a slightly modified version of the RV32I example, and I recently got my hands on this FPGA model. I was looking for a way of testing it on this device to change from simulation and tried to synthesize Kôika's RV32I as a first step, and I stumbled upon an error unrelated to the size issue mentionned in the main README (of which I was not aware of at the time):
Right; originally I was hoping to combine the core with a USB controller for simplicity, but it's hard to fit both on the chip and pass timing.
I noticed that this file exists in the tinyfpga_bx_usbserial repository and spotted an issue seemingly related to Koîka there, which leads me to assume that there is some undocumented dependency on this project but I did not go further than this.
Exactly. If you want to experiment in that direction, the way to go is to take the dependency from that project and build that way. But the core is too big for this to work well.
If the break did not happen too far back, I would be interested in trying to make my version run on the FPGA. Could you possibly recommend an older Kôika commit with which synthesis should work? Also, do you think that removing the multiplication module on my end would be enough to fix the size issue, or is this hard to say?
The way to go if you want the USB interface and RV32I would be
- to remove the multiplier (this is trivial to do, just change
Module Multiplier := ShiftAddMultiplier Mul32Params.
toModule Multiplier := DummyMultiplier Mul32Params.
in RVCore.v) and - to move the register file to RAM (this was suggested to my by @threonorm a few weeks ago), which would save a lot of space, but is a more complicated change
If you're OK with a bit more tinkering, you can use the UART interface, and connect your FPGA to a UART-USB bridge; the UART transmitter costs very little area, so you may even be able to fit the RV32I with no multiplier. The RV32E fits, at least.
from koika.
Thanks a lot, I will try some of these things eventually and update this thread accordingly. Closing the issue for the time being.
from koika.
from koika.
A quick update about this (I ended up not doing much with the TinyFPGA BX until recently).
I got rid of the multiplier module and reduced memory size (8KiB of instruction memory left, the same for data memory). Some tests use more memory than this left me with, so I simplified them (removed some data from rvbench_median_dataset
and rvbench_qsort_dataset
, generated a smaller image for img
). This fits, not by much but it seems to work as it should.
Is there a rationale behind the memory size originally in use besides the fact that it allows for more realistic tests?
from koika.
I don't remember a deep rationale behind the memory size. Are you using the USB interface or the UART one, or just running programs that use the LED but not the console?
from koika.
I am using the UART and I can load both programs that use the LED and the console.
from koika.
Thanks. I left the necessary hardware (the FTDI chip) back in my office at the beginning of the pandemic, I'll try to get it.
from koika.
Related Issues (20)
- Building error (Ocaml 4.11.1) HOT 10
- About the upcoming module system and Kôika's semantics HOT 1
- `unit_t` in ext_fn_t input generates invalid verliog HOT 8
- External function incorrectly pruned if rule is otherwise uneffectful HOT 3
- Context unknown during type checking HOT 2
- Different behavior in simulation and FPGA HOT 3
- Avoidable stalling in the RISC-V example HOT 2
- Potential optimization in the RISC-V example HOT 5
- Multiplier correctness example HOT 1
- Build issues on macOS HOT 26
- Some circuits that include extcalls behave unexpectedly when simulated through Verilator HOT 3
- Infinite loop HOT 4
- Translating Koika's bits_t (Vect) to MIT's bbv HOT 1
- Compilation error with the cosimulation example when verilator >= 5.004
- Vectors and name collisions HOT 2
- "make verilator-tests" results in a failure (cannot find file containing module: 'ext_host_id') HOT 2
- Errors in examples/rv/MultiplierCorrectness.v HOT 2
- Proof failures with (unsupported) Coq 8.12 HOT 3
- Warning message about Boost version triggers spuriously HOT 1
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