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This accelerator uses a Nexys A7 100T FPGA to overlay an one image over another using an image mask and performing masking operations, with the results being displayed over VGA. The purpose of this project was to utilize the parallel nature of FPGAs to create a hardware accelerator for image masking applications.

Pascal 0.01% JavaScript 0.08% Shell 0.27% Batchfile 0.01% HTML 0.09% Tcl 0.07% Verilog 1.42% Coq 7.97% VHDL 89.80% Stata 0.03% Forth 0.01% Makefile 0.01% C++ 0.02% Python 0.01% 1C Enterprise 0.01% SystemVerilog 0.25%
fpga image-masking nexys-a7 hardware-acceleration

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