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nicmem-asplos22-artifact

nnpack

Acceleration package for neural networks on multi-core CPUs

nvfuse

NVMe based File System in User-space

nvme-cli

NVMe management command line interface.

nvmecha

NVMe Controller featuring Hardware Acceleration

nvmed_info

A user-level tool for obtaining various information on the NVMe SSD

nvmedirect

nvmedirect_v2

NVMeDirect v2

nyuziprocessor

GPGPU microprocessor architecture

ocowfc

Open-Channel Open-Way Flash Controller

open-source-fpga-bitcoin-miner

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.

openke

An Open-Source Package for Knowledge Embedding (KE)

openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

orion-osdi22

Serverless optimizations

paracrash

pdpm

Passive Disaggregated Persistent Memory at USENIX ATC 2020.

pheromone

pidram

PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory techniques. Prototype on a RISC-V rocket chip system implemented on an FPGA. Described in our paper: https://arxiv.org/abs/2111.00082

pimcomp-nn

pimsim-nn

pimsimulator

Processing-In-Memory (PIM) Simulator

pocket

Elastic ephemeral storage

polardb-for-postgresql

The default branch of PolarDB switched to “main” on 20210901, which supports compute-storage separation architecture. The “POLARDB_11_STABLE” is the stable branch which is based on PostgreSQL 11.9. The “master” branch in the past switched to “distributed” branch, which supports distributed architecture.

powerinfer

High-speed Large Language Model Serving on PCs with Consumer-grade GPUs

pynq_greengrass

pytorch-direct

Code for Large Graph Convolutional Network Training with GPU-Oriented Data Communication Architecture (accepted by PVLDB).The outdated write-up (https://arxiv.org/abs/2101.07956) explains engineering details, but only a portion of the functionality is migrated to this newer PyTorch version 1.8.0nightly (e152ca5).

pytorch-image-models

PyTorch image models, scripts, pretrained weights -- ResNet, ResNeXT, EfficientNet, EfficientNetV2, NFNet, Vision Transformer, MixNet, MobileNet-V3/V2, RegNet, DPN, CSPNet, and more

pyverilog

Python-based Hardware Design Processing Toolkit for Verilog HDL

r2

The mirror of R2 from lab's private repo.

ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf