Suhas Kudlur Viswanath's Projects
This is a submission for Efabless AI Generated Design Contest.
Implementing arithmetic operations as a service because why not.
Example setup for UVM driven Icarus Verilog Simulation
BFloat16 IP for Open-MPW Tapeouts
Learning bsv
cayde is 32-bit RISC-V core written in SystemVerilog
This repository contains the files required for the Computer Communication Networks course for 5th semester.
Circuit Fault Tester: This tool will process a netlist and the faults in the netlist.
This repository contains chisel hdl files.
This repo consists of all the MATLAB code for the Control Systems course of the 4th Semester ECE department.
A tool that uses Luhn's Algorithm to verify Credit Card numbers
diablo is an Out-Of-Order 64-bit RISC-V processor.
This repository contains MATLAB files for the Digital Communication course of 4th semester of ECE.
The dot files for my Linux setup.
Discord bot that reminds you to drink water
This repository consists of all the MATLAB programs of the Principles of Digital Signal Processing Laboratory of 4th semester of ECE department.
Eleventy Duo is a minimal and beautiful Eleventy theme for personal blogs.
Join us :)
Files from the eUVM Workshop by InCore Semiconductors.
FleetVision - HashCode 11 Hackathon Project
gegit -> Getting your personal Git repositories from your terminal made easy
gravity is a p2p file transfer tool.
The website for the Homebrew Organization, dev branch hosting :
This repo contains SV and Sycl code for the FPGA Academy using Intel FPGAs on the oneAPI platform.
Build your hardware, easily!
A list of all those involved with PES Open Source!