The instr input to the IRQ module comes from a wire called instr, which is not defined anywhere.

Hi, i got an error message when i build the firmware:

/opt/riscv/lib/gcc/riscv32-unknown-elf/8.2.0/../../../../riscv32-unknown-elf/bin/ld: tests/auipc.o(.text+0x32): 6 bytes required for alignment to 8-byte boundary, but only 4 present

how to deal with this?

I created a testbench for the mriscvcore to verify the RTL code on my
own. During my setup of the testbench, I noticed RReady requires two
cycles. This is unusual since RReady had already gone low after the
first cycle of Rvalid.

Here's a snapshot when Rvalid is turned high on a single cycle:

image1

Notice that AWdata throws an 'x value which seems to be a bug to the
internal circuit of mriscvcore.

Now here's a snapshot when Rvalid is turned high at two cycles:

image2

Here AWdata eventually throws 0'h04 value which seems to be correct.

I'm working on packaging mriscv for FuseSoC, but I haven't been able to complete any simulations yet. Running with the default firmware I just get lines saying 7..OK over and over again until the simulations times out