litex-hub / fpga_101 Goto Github PK

Hi,
Would like to run these on a Basys3 board. What code changes would be needed? Can I replace the base.py in each tutorial with one from https://github.com/timvideos/litex-buildenv/blob/master/targets/basys3/base.py to get Basys3 supported?
Thank you.

@enjoy-digital @mithro do you think it is feasible to modify this tutorial to use the ice40 Fomu instead of Nexys4DDR?

There is no license specified for the files in this repository. Are they intended to be public domain / CC0 / BSD / Apache?

To start with FPGA and LiteX, FPGA 101 is great if you have a Nexys4DDR board, but you could have another board like SQRL Acorn CLE 215+ or not board at all.

What can be done in these cases ?

Case A : without any FPGA board
How a given board could be described with with LEDs, switches, ... ?
Could Nexys4DDR board be simulated using Verilator and perhaps Renode ?

Case B: using another FPGA board to emulate with a GUI the Nexys4DDR board
Using a SQRL Acorn CLE 215+, it could perhaps be possible to emulate a Nexys4DDR board following this Complete Block Diagram of FPGAEmu ?

For case A & B, I would be pretty cool, especially for beginners to develop of a GUI to visually mimic HMI of a Nexys4DDR/NEXYS A7 board with support of

Audio
Microphone
2 4-digit seven-segment displays
16 Switches
5 Buttons
16 LEDs
2 Tri-Color LEDs

This concept could even be extended to

• virtual Ethernet 10/100
• virtual SD microSD card
• virtual VGA output

litex-hub/fpga_101/lab002/bcd.py

need complete solution for bcd.py

The bottom says:

"Migen generates a single verilog file from the python description that is then processed by"

By what?

Hello, does anyone have problems compiling the firmware from the lab004?
I'm using KDE Neon based on Ubuntu 18 and the last Litex and RiscV toolchain version, my target is an arty_s7.

When I try to compile de firmware I get this error

Makefile:18: update target 'firmware.elf' due to: isr.o main.o
echo " LD " firmware.elf && riscv64-unknown-elf-ld -nostdlib -nodefaultlibs -Wl,--no-dynamic-linker -Wl,--build-id=none -MD -MP -Os -march=rv32im -mabi=ilp32 -D__vexriscv__ -g3 -fomit-frame-pointer -Wall -fno-builtin -fno-stack-protector -flto -I/home/hyde/Digital/Litex/pythondata-software-picolibc/pythondata_software_picolibc/data/newlib/libc/tinystdio -I/home/hyde/Digital/Litex/pythondata-software-picolibc/pythondata_software_picolibc/data/newlib/libc/include -I/home/hyde/Digital/Litex/litex/litex/soc/software/libbase -I/home/hyde/Digital/Litex/litex/litex/soc/software/include -I/home/hyde/Digital/Litex/litex/litex/soc/software -I/home/hyde/Digital/FPGA/fpga_101/lab004_s7/build/software/include -I/home/hyde/Digital/FPGA/fpga_101/lab004_s7/build/software/include/../libc -I/home/hyde/Digital/Litex/litex/litex/soc/cores/cpu/vexriscv -fexceptions -Wstrict-prototypes -Wold-style-definition -Wmissing-prototypes -L/home/hyde/Digital/FPGA/fpga_101/lab004_s7/build/software/include
-T linker.ld
-N -o firmware.elf
../build//software/libbase/crt0.o
isr.o main.o
-L../build//software/libbase
-L../build//software/libcompiler_rt
-lbase-nofloat -lcompiler_rt
LD firmware.elf
riscv64-unknown-elf-ld: unrecognised emulation mode: abi=ilp32
Supported emulations: elf64lriscv elf32lriscv
make: *** [Makefile:18: firmware.elf] Error 1

So far I can't fix this issue

lab002/display.py defines a class called Display however migen also has a Display defined

As a result the tutorial exits with the following (confusing message) message:

 python base.py  
 Traceback (most recent call last):
  File "base.py", line 129, in <module>
    module = Clock()
  File "base.py", line 109, in __init__
    display.values[0].eq(bcd_seconds.ones),
 AttributeError: 'Display' object has no attribute 'values'

First, I would like to point out in lab004, I think the correct command to run the liteX terminal is litex_terminal instead of lxterm. This is probably outdated.

When using the litex_terminal, I met the problem that I could not write any input to the terminal after rebooting the core. Seems like the terminal is frozen and can only exit.

And if using the newest makefile, I would get this warning:
warning: cannot find entry symbol _start; defaulting to 0000000040000000

Suddenly work. Don't really know what was wrong.

I tried to implement a algorithm in asm based on the lab004 and try to extend it. The program after compile is 8000bytes. The program cannot continue and got stuck. It seems the memory is not enough. However, even if I tried to double the rom, main_ram, sram size, the program still cannot be executed to finish. The program was already simulated in sifive qemu e31 core, so the asm code should not be the problem. Does anyone have some suggestions? A big thank you in advance.

The bit stream was loaded on to the board and it was hang at Liftoff while loading firmware to the board with the command ("litex_term /dev/ttyUSB1 --kernel=firmware.bin"). Here I'm using nexys4ddr board.

    __   _ __      _  __
   / /  (_) /____ | |/_/
  / /__/ / __/ -_)>  <
 /____/_/\__/\__/_/|_|

Build your hardware, easily!

(c) Copyright 2012-2021 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs

BIOS built on May 19 2022 15:53:24
BIOS CRC passed (dbfbcbc7)

Migen git sha1: ac70301
LiteX git sha1: d36e1b60

--=============== SoC ==================--
CPU: VexRiscv @ 100MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 32KiB
SRAM: 8KiB
MAIN-RAM: 16KiB

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
[LXTERM] Received firmware download request from the device.
[LXTERM] Uploading firmware.bin to 0x40000000 (3580 bytes)...
[LXTERM] Upload calibration... (inter-frame: 10.00us, length: 64)
[LXTERM] Upload complete (9.8KB/s).
[LXTERM] Booting the device.
[LXTERM] Done.
Executing booted program at 0x40000000

--============= Liftoff! ===============--

what am I doing wrong?
Is nexys4ddr board supported for https://github.com/litex-hub/fpga_101/tree/master/lab004 ??

Thanks!!!

I want to calculate cpu time in main.c. After executing the makefile, I got the following linker error.

CC main.o
CC firmware.elf
/usr/lib/riscv64-unknown-elf/bin/ld: ../build//software/libc/libc.a(libc_time_clock.c.o): in function clock': /home/user/Desktop/Gayathri_examples/github_lab_examples/fpga_101/lab004/build/software/libc/../../../../../../../../pythondata-software-picolibc/pythondata_software_picolibc/data/newlib/libc/time/clock.c:73: undefined reference to times'
collect2: error: ld returned 1 exit status
make: *** [Makefile:18: firmware.elf] Error 1

I have no idea what happened. I didn't expect the error because I followed the instructions carefully. Can anyone tell me why I got this error and how to resolve it?
If my hardware doesn't support times, is there any way to calculate clock cycles taken by main.c in liteX?

Lesson-002: Create your first FPGA design
en: http://goo.gl/mZJvFQ

On page 4, I guess there is a minor problem with the VHDL code in the upper left.
The process assigns d using q. It should be q assigned by d.

In the build dir of lab004, the Makefile is not correct : during the build process, we have a file named crt0-$(CPU)-ctr.o instead of crt0-$(CPU)-crt.o as required in the Makefile.
I know "crt" meaning (runtime), but maybe the extensions "ctr" has a different meaning ?