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View Code? Open in Web Editor NEWAn Open-Source Design and Verification Environment for RISC-V
License: Apache License 2.0
An Open-Source Design and Verification Environment for RISC-V
License: Apache License 2.0
For testing FPU unit + more
Generate customized tests by tuning gen_opts for coverage closure.
[Description]:
trace_core.log contains xxxxxxxx value at rd
juba@juba:~/LM-RISCV-DV/integrated_cores/SweRV_EH1$ make
mkdir -p out/rtl_sim
Sun, 11 Feb 2024 15:08:59 INFO Processing simulator setup file : yaml/rtl_simulation.yaml
Sun, 11 Feb 2024 15:08:59 INFO Compiling TB
mkdir -p out/seed-14431/.metadata
Sun, 11 Feb 2024 15:09:00 INFO Creating output directory: out/seed-14431/instr_gen
Sun, 11 Feb 2024 15:09:00 INFO Processing regression test list : riscv_dv_extension/testlist.yaml, test: riscv_arithmetic_basic_test
Sun, 11 Feb 2024 15:09:00 INFO Found matched tests: riscv_arithmetic_basic_test, iterations:2
Sun, 11 Feb 2024 15:09:00 INFO Processing simulator setup file : /home/juba/LM-RISCV-DV/google_riscv_dv/yaml/simulator.yaml
Sun, 11 Feb 2024 15:09:00 INFO Found matching simulator: questa
Sun, 11 Feb 2024 15:09:00 INFO Building RISC-V instruction generator
Sun, 11 Feb 2024 15:09:05 INFO Running RISC-V instruction generator
Sun, 11 Feb 2024 15:09:05 INFO Generating 2 riscv_arithmetic_basic_test
Sun, 11 Feb 2024 15:09:05 INFO Running riscv_arithmetic_basic_test with 1 batches
Sun, 11 Feb 2024 15:09:05 INFO Running riscv_arithmetic_basic_test, batch 1/1, test_cnt:2
Sun, 11 Feb 2024 15:09:10 INFO Creating output directory: out/seed-14431/instr_gen
Sun, 11 Feb 2024 15:09:10 INFO Processing regression test list : riscv_dv_extension/testlist.yaml, test: riscv_arithmetic_basic_test
Sun, 11 Feb 2024 15:09:10 INFO Found matched tests: riscv_arithmetic_basic_test, iterations:2
Sun, 11 Feb 2024 15:09:10 INFO Compiling out/seed-14431/instr_gen/asm_tests/riscv_arithmetic_basic_test_0.S
Sun, 11 Feb 2024 15:09:10 INFO Converting to out/seed-14431/instr_gen/asm_tests/riscv_arithmetic_basic_test_0.bin
/home/juba/riscv-demo/bin/riscv64-unknown-elf-ld: cannot use executable file 'out/seed-14431/instr_gen/asm_tests/riscv_arithmetic_basic_test_0.o' as input to a link
Traceback (most recent call last):
File "/home/juba/LM-RISCV-DV/google_riscv_dv/lm_run.py", line 1262, in <module>
main()
File "/home/juba/LM-RISCV-DV/google_riscv_dv/lm_run.py", line 1239, in main
gcc_compile(matched_list, output_dir, args.isa, args.mabi,
File "/home/juba/LM-RISCV-DV/google_riscv_dv/lm_run.py", line 459, in gcc_compile
run_cmd_output(cmd.split(), debug_cmd = debug_cmd)
File "/home/juba/LM-RISCV-DV/google_riscv_dv/scripts/lib.py", line 195, in run_cmd_output
raise exc
File "/home/juba/LM-RISCV-DV/google_riscv_dv/scripts/lib.py", line 192, in run_cmd_output
output = subprocess.check_output(cmd)
File "/usr/lib/python3.10/subprocess.py", line 421, in check_output
return run(*popenargs, stdout=PIPE, timeout=timeout, check=True,
File "/usr/lib/python3.10/subprocess.py", line 526, in run
raise CalledProcessError(retcode, process.args,
subprocess.CalledProcessError: Command '['/home/juba/riscv-demo/bin/riscv64-unknown-elf-ld', '-m', 'elf32lriscv', '--discard-none', '-T/home/juba/LM-RISCV-DV/integrated_cores/SweRV_EH1/riscv_dv_extension/link.ld', '-o', 'out/seed-14431/instr_gen/asm_tests/riscv_arithmetic_basic_test_0.exe', 'out/seed-14431/instr_gen/asm_tests/riscv_arithmetic_basic_test_0.o']' returned non-zero exit status 1.
make: *** [Makefile:254: out/seed-14431/.metadata/instr_gen.compile.stamp] Error 1
[Description]:
In Quasar core, tracer was implemented at module levels e.g exu, lsu, ifu, dec each one has its own log and a single trace_core.log is not generated
Some of the misalign tests in testlist_privilege.yaml and testlist_Zifrncei.yaml are failing due to exception in the spike logs
When a div/rem instruction comes with its rd overwritten by the followed instruction with same rd before its result compilation, the instruction is cancelled out. The design speaks it as in-fly cancel
OP#487 fgduygjh fuiy jkuy ihbkl h mnkhjkgiuibjghjk
Hi, as I known, force-riscv can generate random-instruction faster than riscv-dv because of its base on C++. Did you have a plan to used force-riscv to generate random-instruction in your dv env next up?
Hey there, I was hoping to ask if there is any way to run riscv-dv(google) without the tools mentioned in the pre-req since I'm a student and I don't have any access to any of the tools. While making the generator, I saw that when you enter "run" command, it searches for a simulator (I thinks VCS is default) but I don't have any. I'll appreciate it if someone can suggest a workaround.
Also, for spike, it requires pk and I'm having some difficulty making pk. This is my configure:
sudo CC=/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc ../configure --prefix=/home/salman/toolchains/rv32 --host=riscv32-unknown-elf
and the error at end of make:
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/file.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/syscall.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/handlers.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/frontend.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/elf.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/console.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/mmap.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../pk/entry.S
ar rcv libpk.a file.o syscall.o handlers.o frontend.o elf.o console.o mmap.o entry.o
a - file.o
a - syscall.o
a - handlers.o
a - frontend.o
a - elf.o
a - console.o
a - mmap.o
a - entry.o
ranlib libpk.a
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../bbl/logo.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../bbl/raw_logo.S
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../dummy_payload/dummy_payload.c
echo "int _dummy_payload( int arg ) { return arg; }" > _dummy_payload.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c _dummy_payload.c
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -MMD -MP -Wall -Werror -D__NO_INLINE__ -mcmodel=medany -O2 -std=gnu99 -Wno-unused -Wno-attributes -fno-delete-null-pointer-checks -fno-PIE -DBBL_LOGO_FILE=\"bbl_logo_file\" -DMEM_START=0x80000000 -fno-stack-protector -U_FORTIFY_SOURCE -DBBL_PAYLOAD=\"bbl_payload\" -I. -I../pk -I../bbl -I../softfloat -I../dummy_payload -I../machine -I../util -c ../dummy_payload/dummy_entry.S
../dummy_payload/dummy_entry.S: Assembler messages:
../dummy_payload/dummy_entry.S:23: Warning: unterminated string; newline inserted
../dummy_payload/dummy_entry.S:24: Warning: unterminated string; newline inserted
../dummy_payload/dummy_entry.S:25: Warning: unterminated string; newline inserted
../dummy_payload/dummy_entry.S:26: Warning: unterminated string; newline inserted
../dummy_payload/dummy_entry.S:27: Warning: unterminated string; newline inserted
../dummy_payload/dummy_entry.S:28: Warning: unterminated string; newline inserted
../dummy_payload/dummy_entry.S:29: Warning: unterminated string; newline inserted
ar rcv libdummy_payload.a _dummy_payload.o dummy_entry.o
a - _dummy_payload.o
a - dummy_entry.o
ranlib libdummy_payload.a
/home/salman/toolchains/rv32/bin/riscv32-unknown-elf-gcc -Wl,--build-id=none -nostartfiles -nostdlib -static -fno-stack-protector -o dummy_payload dummy_payload.o -L. -ldummy_payload -lgcc -Wl,--defsym=MEM_START=0x80000000,-T,../dummy_payload/dummy_payload.lds
if readelf -h dummy_payload 2> /dev/null > /dev/null; then objcopy -O binary --set-section-flags .bss=alloc,load,contents dummy_payload bbl_payload; else cp dummy_payload bbl_payload; fi
objcopy: Unable to recognise the format of the input file `dummy_payload'
make: *** [bbl.mk:29: bbl_payload] Error 1
I'll appreciate it if you can help me solve it.
Check for failed load aligned tests and see if it is tracer issue or compliance issue.
Extension of tracer to include atomic instructions and it's post-sim comparison
Generate random assembly tests using 'pyflow' as the simulator.
We should also add the riscv compliance test suite so that we can have a fast Verification baseline.
Hi, @haroonshafique-lm , i think branches should be removed once they are in master. Otherwise there is too much clutter. You can delete branches after a merge by pressing the button for delete branch. You can still do that for closed merges.
It would be good if we can also add torture to the flow as it also supports vector instructions.
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