Comments (10)
devinamatthews
commented on July 17, 2024
1
I guess we need a configure flag to turn these off.
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devinamatthews
commented on July 17, 2024
1
It's because I didn't enable them in BLIS when I did [cz]syr and [cz]symv which was an oversight on my part. I've included all 3 in the fix.
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devinamatthews
commented on July 17, 2024
1
@ajaypanyala please try the branch scalapack-compat and configure with the option --enable-scalapack-compat.
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fgvanzee
commented on July 17, 2024
Regardless of what we do, maybe LAPACK/ScaLAPACK need a configure flag to turn them off on their side.
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ajaypanyala
commented on July 17, 2024
ScaLAPACK works fine with BLIS before Commit 37ca4fd. There doesn't seem like a way to turn those interfaces off in ScaLAPACK.
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devinamatthews
commented on July 17, 2024
My only concern is whether this should be an option specific to those operations or if it should be a generic "ScaLAPACK compat" option in case something else comes up.
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devinamatthews
commented on July 17, 2024
@ajaypanyala is [cz]syr2 affected?
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devinamatthews
commented on July 17, 2024
Looks like it is.
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ajaypanyala
commented on July 17, 2024
Atleast on my end, I do not see any issues with [cz]syr2
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ajaypanyala
commented on July 17, 2024
Using scalapack-compat branch with --enable-scalapack-compat worked. thanks!
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Related Issues (20)
- Default BLIS_[MNK]T values never actually set HOT 9
- fatal error: malloc.h: No such file or directory HOT 2
- Header path for default source build and Debian should match HOT 6
- bli_gemmsup_rd_haswell_asm_d6x8m.c:1296:1:error:bp cannot be used in ams here HOT 3
- New release? HOT 6
- A more complete list of ARM cpu implementations
- arm64 cpu identification is not portable to BSDs HOT 2
- inconsistence between documentation and code for bli_?trmm3 HOT 5
- What is the best way to debug BLIS? HOT 2
- GPU support and PortBLAS HOT 4
- getting error as illegal instruction HOT 4
- Support compiler names with spaces HOT 1
- Regarding Default Behaviour for CPU Affinity HOT 4
- BF16 on AMD CPU? HOT 4
- Upstream BLIS patches for ARM SVE? HOT 5
- Memory location in the prefetch instructions HOT 5
- Facing issue when running following command: pip install --upgrade --no-cache-dir thinc HOT 1
- AMD FX(tm)-6300 Six-Core Processor piledriver errors with check HOT 4
- Not possible to link Blis and Lapack statically into the same executable HOT 10
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