ben-marshall / verilog-vcd-parser Goto Github PK

Consider this example:

$scope module top $end
  $var wire 1 (C \$procdff$4.Q[2] $end
  $var wire 1 (D \$procdff$4.Q[1] $end
  $var wire 1 (E \$procdff$4.Q[0] $end
  $var wire 1 (G \$procdff$4.D[2] $end
  $var wire 1 (H \$procdff$4.D[1] $end
  $var wire 1 (I \$procdff$4.D[0] $end
$upscope $end

It throws a yacc error:

line 2
 : syntax error, unexpected TOK_IDENTIFIER, expecting TOK_KW_END

Parser failed with the following VCD line:
$var wire 1 - D [3] $end

Reason was that VCDScanner.l contained the following:
SCOPE_IDENTIFIER [a-zA-Z_][a-zA-Z_0-9\(\)]+
Changing this to:
SCOPE_IDENTIFIER [a-zA-Z_][a-zA-Z_0-9\(\)]*
Fixed the issue.

In scan_end function, the lexer state was popped. However in scan_begin, it was not pushed.
Initially, I was thinking this should be okay. But it turned out that if I instantiate another VCDFileParser after the first one was destructed, the second would result in segmentation fault even if it is parsing the same file.

I had just one error from the compiler which I eliminated with a simple change to the Makefile (line 17) from:

CXXFLAGS += -I$(BUILD_DIR) -I$(SRC_DIR) -g -std=c++0x

to:

CXXFLAGS += -I$(BUILD_DIR) -I$(SRC_DIR) -g -std=gnu++0x

Fail to handle such definition in a scope (regs[0] ==> [[[reg[63:0] regs[31:0];]]] is the register file in CPU core)?
line 1663 of wave.vcd: $var wire 64 j, regs[0] [63:0] $end
$var wire 64 ~, regs[10] [63:0] $end
$var wire 64 "- regs[11] [63:0] $end

Parsing~/wave.vcd
line 1663
: syntax error, unexpected TOK_DECIMAL_NUM, expecting TOK_KW_END
Parse Failed.

I noticed that VCDTime is declared as a double. However, all timestamps are added via add_timestamp, which is only called in VCDParser.ypp, and the argument is a TOK_DECIMAL_NUM, which is actually an integer. Is there any reason why VCDTime is a double instead of an integer?