Generation of Pulse Width Modulation Using Verilog HDL • This project was aimed to implement PWM using Verilog Hardware Descriptive Language. • It was requested on May 05, 2017. • Submitted in partial fulfillment of the course, Digital Logic Design. • Project was prepared by: Irfan Danish [CIIT/FA15-BEL-012/ISB] Hammad Munir [CIIT/FA15-BEL-034/ISB]

• LED Brightness controller based on PWM (Pulse Width Modulation). • Spartan 6 XC6SLX9 used to implement the project. • ModelSim SE 5.7f is used for Programming & Simulation. • Xilinx ISE 12.2 is used to implement the code on FPGA. • Major task was to produce capricious duty cycles. • There are total 12 Verilog programming modules for this project. • 11 modules consisting 380 lines of Verilog code for design. • 1 module consisting 200 lines of Verilog code for Test Bench.