Issue with common/xf_axi_sdata.hpp file about vitis_libraries HOT 7 CLOSED

Hello @vt-lib-support ,
Sure thing, I've attached an example core. The function of the core is to apply erosion on an input stream of data and send it to an output steam.
As you can see in line 9 of "wrapper.hpp" file, I've included the <ap_axi_sdata.h> file. Additionally I've removed the #include "xf_axi_sdata.hpp" line in the /common/xf_infra.hpp file and added #include <ap_axi_sdata.h> instead. So that the structs in this file use the code in the correct file.
Now if you do the opposite and include "xf_axi_sdata.hpp" instead of <ap_axi_sdata.h> in both wrapper.hpp and xf_infra.hpp, you will see that the RTL Ports and number of their Bits in the Interface section of the Synthesis details Report change to false values, just like the values in the image I showed in my previous comment.
erosion_example.zip

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Hello @Ali-Flt,

Can you please provide any testcase so that we can further investigate?

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I can confirm the described behaviour with current development master branch. Using <ap_axi_sdatah.h> brings the desired axi stream ports while xf_axi_sdata.hpp does not.

I can understand why Xilinx currently inverts a lot of resources in the conversion of the HLS libraries to AXI memory mapped accesses, because it is easier and more universal to use with an OS. Nevertheless I think that the AXI streaming interfaces play an important role, because they use exactly the properties of an FPGA (pixel streaming). I really hope that Xilinx will fix this problem soon.

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@Ali-Flt , @millertheripper
xf_axi_sdata.hpp file has been removed and ap_axi_sdata.h is used wherever necessary, in the current released code.
But, co-simulation doesn't pass because of a known Vitis-HLS issue. It is being resolved and a code update will be posted soon. Thanks.

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Thank you. I can confirm that the issue with the axi stream parameters is now solved. But in fact the co-simulation fails. Do you know if this is an issue related to the vitis libraries or is it caused by the tool itself (Vivado/Vitis 2020.1)?

Regards

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Co-sim issue has been fixed with the recent code update.

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Please reopen if you find any more issues with this function.

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