How to evaluate the power consumption of a xfopencv application at SDSoC environment?

As the picture shows,when I try to write dsa in vivado 2018.2, it shows the error that "Project property dsa.name needs to be set before generating a DSA.", how to solve this problem?

Hi,
I got 2 warnings while building the sdx_app1 in lab 3, do you know what seem to be the issues? I am using zedboard as target board, so there were some modifications made for zedboard as I followed along the tutorials. The build was completed and output files in sd_card folder can be run on my zedboard and output was seen via terminal program. Thank you.

1. WARNING: [CF2XD 83-1006] Invalid clock id 1 for platform zedboard
   

2. CRITICAL WARNING: [VPL 60-724] 'D:/SDSoC_projects/sdx_workspace/zedboard/export/zedboard/hw/zedboard.dsa' : failed DSA integrity check: digest mismatch.
   

Hi, I was migrating my OpenCV application to xfOpenCV. I got the following error when build with SDx2018.2. How can I fix this?

[16:40:23] Starting bitstream generation..

===>The following messages were generated while Compiling (bitstream) accelerator binary: bin Log file: /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0/vivado/prj/prj.runs/impl_1/runme.log :
ERROR: [VPL-4] Design failed to meet timing.
Failed timing checks (paths):
{zcu102_rv_ss_i/zynq_ultra_ps_e_0/inst/PS8_i/MAXIGP0ACLK --> zcu102_rv_ss_i/axi_interconnect_hpm0/m14_couplers/auto_cc/inst/gen_clock_conv.gen_sync_conv.gen_conv_write_ch.w_sync_clock_converter/gen_sync_clock_converter.m_tvalid_r_reg/D}

Please check the routed checkpoint (dr_routed_timing.dcp) and timing summary report (dr_timing_summary.rpt) for more information.
ERROR: [VPL 60-704] Integration error, problem implementing dynamic region, route_design ERROR
ERROR: [VPL 60-806] Failed to finish platform linker
ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling '/home/jun/Programs/Xilinx2018.2/SDx/2018.2/bin/vpl --iprepo /home/jun/workspace_sdx/VideoFusion/Release/_sds/iprepo/repo --iprepo /home/jun/Programs/Xilinx2018.2/SDx/2018.2/data/ip/xilinx --platform /home/jun/zcu102-rv-ss-2018-2/zcu102_rv_ss/zcu102_rv_ss.xpfm --temp_dir /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0 --output_dir /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0/vpl --input_file /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0/.xsd/top.bd.tcl --target hw --save_temps --kernels w0_xf_boxFilter:w3_xf_add:w2_xf_subtract:w1_xf_multiply:w4_xf_calcHist:adapter --webtalk_flag SDSoC --remote_ip_cache /home/jun/workspace_sdx/ip_cache --xp "vivado_prop:run.impl_1.{STEPS.PHYS_OPT_DESIGN.ARGS.MORE OPTIONS}={-directive Explore}" --xp "vivado_prop:run.impl_1.{STEPS.ROUTE_DESIGN.ARGS.MORE OPTIONS}={-directive Explore}" --xp "param:compiler.deleteDefaultReportConfigs=false" '
sds++ log file saved as /home/jun/workspace_sdx/VideoFusion/Release/_sds/reports/sds.log
ERROR: [SdsCompiler 83-5004] Build failed
sds++ completed at Tue Mar 19 16:45:02 UTC 2019

Hi,
As I followed step 2 in lab 3 (Optimize the Application Code), upon project build completion after inserting #pragma SDS data sys_port(A:ACP, B:AFI) code in mmultadd.h, mmult_1 IP port B was not assigned to AFI port in the Data Motion Network Report as shown in the tutorial. However, if I perform “clean project” before “build project”, mmult_1 IP port B will be assigned to AFI port in the Data Motion Report.

Hi,
As it is mentioned in "Migrate OpenCV to xfOpenCV Labs", it is designed to use the released ZCU102 reVISION Platform.
I want to run this lab on Ultra96 platform. Is there any where to find released Ultra96 reVision Platform to run this lab ?

Why the following three functions could not be resolved.
xf::colorthresholding
xf::erode
xf::dilate
But no bug in the line where xf::RGB2HSV is used.
And I can not find the xf::colorthresholding function in the Xilinx OpenCV User Guide (UG1233)
Is so weird. I'm sure I Edited the CFLAGS right and all head files are included.

Hi,
In lab 2 performance estimation, it seems not all function calls in the main.cpp can be set as root function. Only the ones with small "S" letter on the upper right of the green dots ahead of the function names were displayed in the "select root function" window, if it is possible to select any function we want? And once I set root function from main to others, I was not able to see the main function in the “select root function windows” again in order to change back. Is there anyway to set it back? Thank you in advance!

Where can I download a zedboard reVison platform? Or may be zynq_7000 board [costom].

Hello,when i compile my code with SDx in lab2, I get this error:

when
Step 2: Creating an FSBL Application
Right-click on Debug and select Build.

The SDx Console window shows the FSBL compilation steps and the size of the resulting fsbl.elf executable software file.

best Regards

Error occur
when I do the step 2 of Lab 2: Performance Estimation

sds.log
... ERROR: [VPL 60-399] vivado failed, please see log file for detail: '/home/greedyhao/Projects/fpga/sdx-2018-2/lab2_2/Release/_sds/p0/vivado/vivado.log' ERROR: [VPL 60-806] Failed to finish platform linker ...
vivado.log
... couldn't change working directory to "prj/prj.sim/sim_1/behav/xsim": no such file or directory while executing "cd $project_name/$project_name.sim/sim_1/behav/$simulatorSelected" (procedure "hw_em_common_util::generate_simulation_scripts_and_compile_u..." line 49) invoked from within "hw_em_common_util::generate_simulation_scripts_and_compile_unip $config_info" (file "/home/greedyhao/Projects/fpga/sdx-2018-2/lab2_2/Release/_sds/p0/vivado/ipirun.tcl" line 192) ...

In lab 1 the user will need to write out a HDF. Lab 2 step 4/5 says
Click Add New DSA/HDF….

In the Add New DSA/HDF dialog, navigate to the HDF exported in Lab 1.

Lab 1 needs to add in the step at the end. File -> Export Hardware (Local to project)

Hi, I'm trying to migrate my opencv application to xfopencv. I already built it with zcu102 revision platform, but when I transfer to zedboard, error shown as follow.

'' ERROR: [SYNCHK 200-79] Cannot find the top function 'w0_xf_boxFilter' in the design. Possible causes are: (1) the top function name is misspelled; (2) the top function is nonexistent or declared as static.
ERROR: [HLS 200-70] Synthesizability check failed.''

log file attached here:
sds_guided_filter.log

My setting is as follow:

/usr/local/arm/opencv-install/include/opencv is a cross compilied OpenCv.

This is my source file. Could anyone help me build it?
Thanks.

Hi, I see there is a zynq7_ board [costom] platform in the tutorial of Migrate OpenCV to xfOpenCV . Where can I download it?

I have a ZCU104 and worked through the OpenCV to xfOpenCV tutorial. I swapped out the board files from the zcu102-rv-ss to zcu104-rv-ss. Everything successfully built, however when I bring the 4 files from the tutorial over to my board and run "./colordetect image.jpg" I am met with nothing. The ZCU104 is unresponsive and generates no output. I am unable to kill the program with CTRL-C or any other attempts other than to turn off the board. I am wondering if there is an additional step or something to have this tutorial run on the ZCU104.

I built the system using the code from the source folder and followed the tutorial, as well as building the solution folder code. Both with the same result.

Hello,

After setting and creating the project for lab 6, I try to load the debug (Debug As > Launch on Hardware)
But I face with an error (as the image). Is there any idea for this?

Thanks,
TuanH

I try to build example same as tutorial and document but i got some problem with argument in xf: :erode, xf::dilate with wrong matching function call.
error log:
/home/fallinlove/SDx_workspace/opencvsample/src/colordetect_accel.cpp:24:2: error: no matching function for call to 'erode'
xf::erode<XF_BORDER_CONSTANT, XF_8UC1, HEIGHT, WIDTH, XF_NPPC1>(_range, _erode);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/fallinlove/SDx_workspace/opencvsample/libs/xfopencv/include/imgproc/xf_erosion.hpp:323:6: note: candidate function template not viable: requires 3 arguments, but 2 were provided
void erode (xf::Mat<TYPE, ROWS, COLS, NPC> & _src, xf::Mat<TYPE, ROWS, COLS, NPC> & _dst,unsigned char _kernel[K_ROWSK_COLS])
^
/home/fallinlove/SDx_workspace/opencvsample/src/colordetect_accel.cpp:25:2: error: no matching function for call to 'dilate'
xf::dilate<XF_BORDER_CONSTANT, XF_8UC1, HEIGHT, WIDTH, XF_NPPC1>(_erode, _dilate1);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/fallinlove/SDx_workspace/opencvsample/libs/xfopencv/include/imgproc/xf_dilation.hpp:318:6: note: candidate function template not viable: requires 3 arguments, but 2 were provided
void dilate (xf::Mat<TYPE, ROWS, COLS, NPC> & _src, xf::Mat<TYPE, ROWS, COLS, NPC> & _dst,unsigned char _kernel[K_ROWSK_COLS])
^
/home/fallinlove/SDx_workspace/opencvsample/src/colordetect_accel.cpp:26:2: error: no matching function for call to 'dilate'
xf::dilate<XF_BORDER_CONSTANT, XF_8UC1, HEIGHT, WIDTH, XF_NPPC1>(_dilate1, _dilate2);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/fallinlove/SDx_workspace/opencvsample/libs/xfopencv/include/imgproc/xf_dilation.hpp:318:6: note: candidate function template not viable: requires 3 arguments, but 2 were provided
void dilate (xf::Mat<TYPE, ROWS, COLS, NPC> & _src, xf::Mat<TYPE, ROWS, COLS, NPC> & _dst,unsigned char _kernel[K_ROWSK_COLS])
^
/home/fallinlove/SDx_workspace/opencvsample/src/colordetect_accel.cpp:27:2: error: no matching function for call to 'erode'
xf::erode<XF_BORDER_CONSTANT, XF_8UC1, HEIGHT, WIDTH, XF_NPPC1>(_dilate2, _dst);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/fallinlove/SDx_workspace/opencvsample/libs/xfopencv/include/imgproc/xf_erosion.hpp:323:6: note: candidate function template not viable: requires 3 arguments, but 2 were provided
void erode (xf::Mat<TYPE, ROWS, COLS, NPC> & _src, xf::Mat<TYPE, ROWS, COLS, NPC> & _dst,unsigned char _kernel[K_ROWSK_COLS])
^
ERROR: [SdsCompiler 83-5005] clang exited with non-zero code processing /home/fallinlove/SDx_workspace/opencvsample/src/colordetect_accel.cpp
sds++ log file saved as /home/fallinlove/SDx_workspace/opencvsample/Release/_sds/reports/sds_colordetect_accel.log
ERROR: [SdsCompiler 83-5004] Build failed

src/subdir.mk:21: recipe for target 'src/colordetect_accel.o' failed
make: *** [src/colordetect_accel.o] Error 1

15:43:25 Build Finished (took 17s.858ms)

https://github.com/Xilinx/SDSoC-Tutorials/blob/master/platform-creation-tutorial/Lab2-Creating-Software-Components.md
Step 2: Creating an FSBL Application
3 On the Platform dialog, select Hardware specification (DSA/HDF).

why my New SDx Project window cann't select the Type?

Hi,
As I followed along lab 3 from step 1 through step 6, there is no issue to add a custom platform to repository then selected this custom platform in step 6 as a platform type for sdx_app1 project.
After lab3, I created a new workspace for a different lab, and then I was not able to find the custom platform name created in lab 3 from the platform list for the new project. I am not sure if it is because the workspace is different. Now should I use the steps in lab 3 to create a new platform with the files stored in staging area from lab 2, and then generate the platform and add it into repository in current workspace again? Or is there any easy way to do it? Thanks in advance!

In lab1 step2 (create an IP Integrator Design), Clocking Wizard IP’s reset type is set to active low. Is it because the Zynq7 SoC is used? Should I need to set reset type to Low for all my projects that use Zynq7 in the future? Thanks in advance!