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pyxir's Introduction

PyXIR

PyXIR is an Neural Network Intermediate Representation (IR) for deep learning. It is designed to be an interface between deep learning frameworks and neural network hardware accelerators, specifically Xilinx Vitis-AI FPGA based accelerators like DPU.

At the moment PyXIR integrates with following frameworks:

and with following Vitis-AI accelerators:

  • DPUCADX8G (formerly DPUv1)
  • DPUCZDX8G (formerly DPUv2)

Note that not all accelerators are enabled through all frameworks at the moment. For example, through the ONNXRuntime framework only the DPUCADX8G accelerator is supported for now.

pyxir's People

Contributors

anilmartha avatar eghasemi89 avatar jornt-xilinx avatar pankajdarak-xlnx avatar settle avatar volcacius avatar

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pyxir's Issues

Instance segmentation

have anyone successfully compiled any instance segmentation model for xilinx hardware? tried maskrcnn, yolact compilation using tvm (my hardware - zcu104) but no luck

Allow partitioning, quantization and compilation for graphs with multiple subgraphs

The current state of the code does not allow for all kinds of operations (partitioning, quantization and compilation) to be performed on a graph with multiple subgraphs. For example the yolov4-tiny model, has split operations which are not supported by the DPU, thus the graph should be split into multiple subgraphs and each of these subgraphs should be quantized and compiled to IR for the DPU.

The problem already starts in partitioning. After partitioning the graph into subgraphs, the code figure out what the biggest subgraph is and then throws away all the other subgraphs, such that only one subgraph is left. This however, completely changes the behavior of the model and is not resulting in the intended behavior. The following code deletes all the other subgraphs:

largest_xp, largest_xp_size = "", 0
for xp in sorted(par_2_names.keys()):
if len(par_2_names[xp]) > largest_xp_size:
largest_xp = xp
largest_xp_size = len(par_2_names[xp])
for xp in list(par_2_names.keys()):
if xp != largest_xp:
del par_2_names[xp]
for xname, xp_lst in list(name_2_pars.items()):
if xp_lst[0] != largest_xp:
del name_2_pars[xname]

By removing this code, is is possible to generate a graph with multiple subgraphs, but then in the next stage (quantization), it doesn't work, since that code assumes that only one subgraph is present. There seems to be some code written that should be able to quantize a graph with multiple subgraphs, but that currently doesn't work either. (See base_subgraph_quantizer.py)

It would be nice if the pyXIR flow would support this use case. I'm currently looking into this and figuring out if I can get this to work.

tvm partition_for_vitis_ai of TFLite model: "Value Error: Could not add xlayer with name..."

I’ve made a tflite version of EfficientDet-Lite{0,1,2} following tutorial at RetrainEfficientDet Model Maker tf2

I then follow Compile TFLite Models to load the model

And finally Vitis AI Integration – tvm to compile the model for the Xilinx KV-260.

I have everything working up until the “partition_for_vitis_ai()” function call in Vitis AI Integration – tvm. Although I have verified that this works for the mxnet model and tflite models used in the tvm examples. All of my EfficientDet-Lite models (0, 1, 2) compile and run with target = 'llvm'. None-the-less, when I specify DPU_TARGET and attempt to partition for vitis ai, I get the following error:

>>mod = partition_for_vitis_ai(mod, params, dpu=dpu_target)
---------------------------------------------------------------------------
ValueError                                Traceback (most recent call last)
<ipython-input-30-36b2c4f557b5> in <module>
:
:
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/pyxir-0.3.3-py3.6-linux-x86_64.egg/pyxir/graph/xgraph.py", line 185, in add
    self._xgraph.add(X._get_xlayer())
ValueError: Could not add xlayer with name: nn_max_pool2d_NHWC-NCHW-94770022471280as the layer already exists.
Any suggestions on what this error means, or how it might be fixed?
---------------------------------------------------------------------------
ValueError                                Traceback (most recent call last)
<ipython-input-30-36b2c4f557b5> in <module>
:
:
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/pyxir-0.3.3-py3.6-linux-x86_64.egg/pyxir/graph/xgraph.py", line 185, in add
    self._xgraph.add(X._get_xlayer())
ValueError: Could not add xlayer with name: nn_max_pool2d_NHWC-NCHW-94770022471280as the layer already exists.

pyxir.__version = '0.3.3'
Any suggestions on what this error means, or how it might be fixed?

Update to TVM's Vitis AI deploy page required? Couldnt build the docker

https://tvm.apache.org/docs/how_to/deploy/vitis_ai.html needs to be updated?
Seems TVM's main branch requires 3.7 to build, but pyxir is installed inside conda for python 3.6. How can we get around this issue?
Tried 0.3.5 Pyxir version too

CMake Error at /usr/share/cmake-3.23/Modules/FindPackageHandleStandardArgs.cmake:230 (message):
  Could NOT find PythonInterp: Found unsuitable version "3.6.13", but
  required is at least "3.7" (found
  /opt/vitis_ai/conda/envs/vitis-ai-tensorflow/bin/python3)
Call Stack (most recent call first):
  /usr/share/cmake-3.23/Modules/FindPackageHandleStandardArgs.cmake:592 (_FPHSA_FAILURE_MESSAGE)
  /usr/share/cmake-3.23/Modules/FindPythonInterp.cmake:169 (FIND_PACKAGE_HANDLE_STANDARD_ARGS)
  cmake/modules/contrib/VitisAI.cmake:20 (find_package)
  CMakeLists.txt:501 (include)

@jornt-xilinx Any suggestions?

Support for MaxPool autopad attribute SAME_UPPER

Hey @jornt-xilinx, @jtuyls and everybody else !

I'm trying to use pyxir to convert a yolov4-tiny onnx model to XIR, and eventually run it on a Edge DPU. When trying to convert the model using from pyxir.frontend.onnx.base import from_onnx I get the following error:

>>> xmodel = from_onnx(onnx_model)
Traceback (most recent call last):
  File "<stdin>", line 1, in <module>
  File "/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.2.0-py3.6-linux-x86_64.egg/pyxir/frontend/onnx/base.py", line 48, in from_onnx
    return _from_onnx(onnx_model, postprocessing=postprocessing)
  File "/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.2.0-py3.6-linux-x86_64.egg/pyxir/frontend/onnx/base.py", line 165, in _from_onnx
    Xs = registry[op_type](wrapped_node, params, xmap)
  File "/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.2.0-py3.6-linux-x86_64.egg/pyxir/frontend/onnx/onnx_2_xlayer_registry.py", line 116, in __base_onnx_2_xlayer
    Xs = onnx_2_xlayer_func(node, params, xmap)
  File "/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.2.0-py3.6-linux-x86_64.egg/pyxir/frontend/onnx/ops/onnx_l2_convolution.py", line 527, in max_pool
    .format(auto_pad))
ValueError: MaxPool autopad attribute not supported but was: SAME_UPPER

I was wondering whether it is possible to add support for this feature, or to somehow work around the problem?

Thanks in advance!

Compiling MaskRCNN from Torchvision model zoo issues

JIT traced maskrcnn model from model zoo and provided desired layouts but couldn't avoid Attribute error. Any workarounds for this?

mod, params = relay.frontend.from_pytorch(script_module, shape_list)

mod = relay.transform.InferType()(mod)
mod["main"] = bind_params_by_name(mod["main"], params)
mod = transform.RemoveUnusedFunctions()(mod)

# no warnings when included these in desired layouts
#desired_layouts = {'nn.conv2d': ['NHWC', 'default'], 'image.resize2d': ['NHWC'], 'vision.roi_align': ['NHWC','default'], 'nn.conv2d_transpose':['NHWC','default']}

desired_layouts = {'nn.conv2d': ['NHWC', 'default']}
seq = tvm.transform.Sequential([relay.transform.RemoveUnusedFunctions(),
                                relay.transform.ConvertLayout(desired_layouts),
                                relay.transform.FoldConstant()])
with tvm.transform.PassContext(opt_level=3):
    mod = seq(mod)

mod = relay.transform.DynamicToStatic()(mod)

# getting below mentioned here even after using DynamicToStatic() 
mod = partition_for_vitis_ai(mod, params, dpu=target)

print(mod['main'])

AttributeError: <class 'tvm.tir.expr.Any'> has no attribute value

@jornt-xilinx Any suggestion on this?

Support TreeEnsembleClassifier

I am trying to translate an xgboost model using ONNX or TVM. Translation fails due to lack of support for TreeEnsembleClassifier to XLayer conversion.

AssertionError while annotating deeplabv3 model from pytorch

assert i == axis or len(check) == 1

Trying to build deeplabv3 from pytorch to deploy on top of xilinx EDGE device - zcu104. Facing some issue while annotating. Code snippets here:

mod, params = relay.frontend.from_pytorch(scripted_model, shape_list)
mod["main"] = bind_params_by_name(mod["main"], params)
desired_layouts = {'nn.conv2d': ['NHWC', 'default']}
seq = tvm.transform.Sequential([relay.transform.RemoveUnusedFunctions(),
                                relay.transform.ConvertLayout(desired_layouts),
                                relay.transform.FoldConstant()])
with tvm.transform.PassContext(opt_level=3):
    mod = seq(mod)
mod = annotation(mod, params, target) #shows error here

Two doubtful things in output:

/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/frontend/tvm/relay_tools/relay_l10_temporary.py:64: UserWarning: Convert Relay Adaptive Avg pool2d layer into normal average pool2d layer
warnings.warn("Convert Relay Adaptive Avg pool2d layer into normal"

File "/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/frontend/tvm/relay_tools/relay_l1_basic.py", line 414, in concatenate
X = px.ops.concat(op_name, data_layers, axis, relay_id=relay_idx)
File "/home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/graph/ops/l1_basic_nn.py", line 167, in concat
assert i == axis or len(check) == 1
AssertionError

While printing/debugging some values near the above-referenced line, noticed that there is a TODO tag. Anyone working on this implementation? (FYI: It seems i=2 & axis=1 and check={132,108,156,86,28} when it throws assertion error).

mmdetect based SOLO - Instance segmentation support

I can see the SOLO is added in Vitis_AI_2 model zoo but seems supported only for Versal boards. I am trying to compile it for ZCU104 but couldn't make it yet.

  1. Is it a hardware limitation or just due to a performance issue that SOLO is not provided for Zynq Ultrascale boards?
  2. How to pull specific layers alone onto dpu and compile most for CPU with TVM/pyxir?

Thanks.

BiasAdd is not an input for Relu

["Convolution", "Conv2DTranspose", "Eltwise", "BatchNorm", "Scale", "Pooling"]

Hi @jornt-xilinx ,
Is it possible to add "BiasAdd" to the check-list of valid inputs for Relu operation. Because I got an issue when I had a sequence as conv+add+Relu, the Relu operation was annotated as unsupported by DPU because BiasAdd is not one of the check list. This leads to issue in the graph annotation and partitioning

Resnet-18 example on host fails to compile the model

Hi,

I'm trying to use TVM on the ZCU102. I successfully compiled a PYNQ image and a PYNQ DPU for the ZCU102. I also managed to set up the environment for Vitis AI, TVM and PyXIR on host (Ubuntu 20.04) but when running the Resnet-18 example on host I'm getting the following error, (I know it shows ZCU104 but I'm getting the same error by changing the target):

********************* Quantization Summary *********************      
INFO: Output:       
  quantize_eval_model: /tmp/tmpqe35e808/quantize_eval_model.pb       
  deploy_model: /tmp/tmpqe35e808/deploy_model.pb
Segmentation fault (core dumped)
Traceback (most recent call last):
  File "edge_resnet_18_host.py", line 219, in <module>
    InferenceSession.run()
  File "/workspace/tvm/python/tvm/contrib/graph_executor.py", line 206, in run
    self._run()
  File "tvm/_ffi/_cython/./packed_func.pxi", line 323, in tvm._ffi._cy3.core.PackedFuncBase.__call__
  File "tvm/_ffi/_cython/./packed_func.pxi", line 257, in tvm._ffi._cy3.core.FuncCall
  File "tvm/_ffi/_cython/./packed_func.pxi", line 246, in tvm._ffi._cy3.core.FuncCall3
  File "tvm/_ffi/_cython/./base.pxi", line 163, in tvm._ffi._cy3.core.CALL
tvm._ffi.base.TVMError: AssertionError: Can't retrieve right out tensor names from DNNC compiler output
At:
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.3.0-py3.6-linux-x86_64.egg/pyxir/contrib/target/components/DPUCZDX8G/vai_c_dnnc.py(164): compile
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.3.0-py3.6-linux-x86_64.egg/pyxir/contrib/target/components/DPUCZDX8G/zcu104.py(77): xgraph_dpu_zcu104_compiler
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.3.0-py3.6-linux-x86_64.egg/pyxir/base.py(156): compile
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.3.0-py3.6-linux-x86_64.egg/pyxir/base.py(208): compile_opaque_func
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.3.0-py3.6-linux-x86_64.egg/pyxir/opaque_func.py(113): opaque_func_wrapper
  /workspace/tvm/python/tvm/contrib/graph_executor.py(206): run
  edge_resnet_18_host.py(219): <module>

I carefully followed https://tvm.apache.org/docs/deploy/vitis_ai.html#vitis-ai-integration multiple times with the same error at the end.

Run Deeplabv3 (resnet 101 backbone) from pytorch framework on Xilinx at good performance metric

Trying to build deeplabv3 from PyTorch to deploy on top of Xilinx EDGE device - zcu104. Facing some issues while quantizing. For good metrics as suggested in #33 (comment) updated model with these changes:

  1. Tried with padding and dilation = (2,2) instead of default (4,4), (12,12), (24,24), (36,36)
  2. Removed dropouts
  3. Adjusted conv2d layer to handle dpu constraint (kernel_w *kernel_h * (ceil(input_channel / channel_parallel))
    <= bank_depth/2) - Resnet 101 backbone has 2048 size conv2d layers (not supported on dpu) - Edited final layer to have 1024 max channels, perfectly eligible to run in dpu.

Every change seems to be not affecting quantization/compilation except changing padding & dilation of (4,4) to (2,2) which is important for good inference metrics.

Attached mod['main'] after mergecompiler ->
mod_main_after_mergecompiler.txt

**************************************************
* START GRAPH COMPILATION FOR TARGET: DPUCZDX8G-zcu104
**************************************************
INFO:pyxir:Command:
        dnnc-dpuv2 --parser tensorflow            --frozen_pb /tmp/tmpfstowlv_/deploy_model.pb             --cpu_arch arm64             --output_dir /tmp/tmpfstowlv_/             --net_name xp0             --dcf /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/contrib/target/components/DPUCZDX8G/./ZCU104.dcf

INFO:pyxir:Output:
Kernel topology "xp0_kernel_graph.jpg" for network "xp0"
kernel list info for network "xp0"
                               Kernel ID : Name
                                       0 : xp0

                             Kernel Name : xp0
--------------------------------------------------------------------------------
                             Kernel Type : DPUKernel
                               Code Size : 2.28MB
                              Param Size : 46.23MB
                           Workload MACs : 77307.97MOPS
                         IO Memory Space : 3.69MB
                              Mean Value : 0, 0, 0,
                      Total Tensor Count : 111
                Boundary Input Tensor(s)   (H*W*C)
                            xinput0:0(0) : 224*224*3

               Boundary Output Tensor(s)   (H*W*C)
             nn_relu_93879679120560:0(0) : 28*28*256
             nn_relu_93879463326768:0(1) : 28*28*256
             nn_relu_93879463325248:0(2) : 28*28*1024
             nn_relu_93879463331328:0(3) : 28*28*256
             nn_relu_93879463329808:0(4) : 28*28*256
             nn_relu_93879463328288:0(5) : 28*28*256

                        Total Node Count : 110
                           Input Node(s)   (H*W*C)
        nn_conv2d_93879632672880_Conv(0) : 224*224*3

                          Output Node(s)   (H*W*C)
        nn_conv2d_93879463325632_Conv(0) : 28*28*256
               nn_relu_93879463325248(0) : 28*28*1024
        nn_conv2d_93879463330192_Conv(0) : 28*28*256
        nn_conv2d_93879463328672_Conv(0) : 28*28*256
        nn_conv2d_93879463327152_Conv(0) : 28*28*256
        nn_conv2d_93879679119424_Conv(0) : 28*28*256





INFO:pyxir:Output names: ['nn.relu-93879463329808', 'nn.relu-93879463328288', 'nn.relu-93879463331328', 'nn.relu-93879463326768', 'nn.relu-93879463325248', 'nn.relu-93879679120560']
Traceback (most recent call last):
  File "compile_pytorch_deeplab.py", line 321, in <module>
    InferenceSession.run()
  File "/workspace/python/tvm/contrib/graph_executor.py", line 206, in run
    self._run()
  File "tvm/_ffi/_cython/./packed_func.pxi", line 322, in tvm._ffi._cy3.core.PackedFuncBase.__call__
  File "tvm/_ffi/_cython/./packed_func.pxi", line 257, in tvm._ffi._cy3.core.FuncCall
  File "tvm/_ffi/_cython/./packed_func.pxi", line 246, in tvm._ffi._cy3.core.FuncCall3
  File "tvm/_ffi/_cython/./base.pxi", line 160, in tvm._ffi._cy3.core.CALL
tvm._ffi.base.TVMError: AssertionError: Can't retrieve right out tensor names from DNNC compiler output
At:
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/contrib/target/components/DPUCZDX8G/vai_c.py(164): compile
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/contrib/target/components/DPUCZDX8G/zcu104.py(81): xgraph_dpu_zcu104_compiler
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/base.py(156): compile
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/base.py(208): compile_opaque_func
  /home/vitis-ai-user/.local/lib/python3.6/site-packages/pyxir-0.1.6-py3.6-linux-x86_64.egg/pyxir/opaque_func.py(113): opaque_func_wrapper
  /workspace/python/tvm/contrib/graph_executor.py(206): run
  compile_pytorch_deeplab.py(321): <module>

@jornt-xilinx Need your support. Created a new issue here for easy tracking.

No module named 'tensorflow'

Working with ZCU104 Edge device. Using apache TVM workflow with VItis AI on top of PYNQ image. Tensorflow fopor aarch64 doesnt comes with pynq? do i need to compile and use my own tensorflow? or did I miss anything?

root@pynq:~/tvm/python# python3 -c 'import pyxir'
/usr/local/lib/python3.6/dist-packages/pyxir-0.1.6-py3.6-linux-aarch64.egg/pyxir/runtime/__init__.py:34: UserWarning: Could not load `cpu-tf` runtime because of error: No module named 'tensorflow'
  .format(e))

RuntimeModule's load function member produces segmentation fault

@jornt-xilinx

I've successfully exported and then imported the Runtime Module on an x86_64 host targeting an DPUCADX8G using the following code to import the exported runtime module:

    std::ifstream in_file(rt_mod_holder_filename);
    std::stringstream buffer;
    buffer << in_file.rdbuf();
    std::string serialized_rt_mod = buffer.str();
    in_file.close();

    std::istringstream sstream(serialized_rt_mod);
    rt_mod_holder.reset(new pyxir::runtime::RuntimeModule());
    rt_mod_holder->deserialize(sstream);

However, if I replace the above with the load function in the RuntimeModule class, i.e.,

    rt_mod_holder->load(rt_mod_holder_filename);

I get the following segmentation fault error:

Thread 1 "python" received signal SIGSEGV, Segmentation fault.
0x00007fffb84f2d91 in pyxir::ISerializable::deserialize (this=0x0, sstream=...) at ./pyxir/include/pyxir/runtime/../common/serializable.hpp:41

As far as I know, the two should produce equivalent results, or else something is wrong with the load function. One thing I noticed when diving into the load function is that I don't see a similar reset function call as the verbose code version above.

[TVM Frontend][Pytorch] Deconvolution support - nn.ConvTranspose2d - Quantization issue

Docker Image Version: 2.0.0.1103 (CPU)
Vitis AI Git Hash: 06d7cbb

torch: 1.7.0
tvm: 0.9.dev543+g0009a308d
pyxir: 0.3.3

Minimal Reproducible code:

import pyxir
import pyxir.contrib.target.DPUCZDX8G

import tvm
from tvm import contrib
import tvm.relay as relay
from tvm.relay import transform
from tvm.contrib import utils, graph_executor as graph_runtime
from tvm.contrib.target import vitis_ai
from tvm.relay.build_module import bind_params_by_name
from tvm.relay.op.contrib.vitis_ai import partition_for_vitis_ai

import logging
logging.basicConfig()
logging.getLogger('pyxir').setLevel(logging.INFO)

import os
import numpy as np
from typing import List, Any
from PIL import Image
from collections import namedtuple

import torch
from torch import nn
import torchvision
from torchvision import transforms
import cv2

def do_trace(model, in_size=100):
    model_trace = torch.jit.trace(model, torch.rand(1, 3, in_size, in_size),check_trace=False)
    model_trace.eval()
    return model_trace

FILE_DIR   = os.path.dirname(os.path.abspath(__file__))
HOME_DIR   = os.getenv('HOME')
QUANT_DIR  = os.path.join("/workspace","my_workspace/pics/coco_val2017")

def transform_image_torchvision(image, in_size):
    my_preprocess = transforms.Compose(
        [
            #transforms.Resize(in_size),
            transforms.CenterCrop(in_size),
            transforms.ToTensor(),
            #transforms.Normalize(mean=[0.485, 0.456, 0.406], std=[0.229, 0.224, 0.225]),
        ]
    )
    image = my_preprocess(image)
    return image

def transform_image_torchvision_NCHW(image, in_size):
    image = transform_image_torchvision(image, in_size)
    image = image[np.newaxis, :]
    return image
    
class Dummy(nn.Module):
  def __init__(self):
    super().__init__()
    self.up2 = nn.Sequential(nn.ConvTranspose2d(3, 3, 3, stride=2, padding=0))
    
  def forward(self, x):
    return self.up2(x)

model = Dummy()
in_size = 550
inp = torch.rand(1, 3, in_size, in_size)
with torch.no_grad():
     out = model(inp)
     script_module = do_trace(model, in_size=550)

input_name = "data"
shape_list = [(input_name, (1,3,in_size,in_size))]
target      = 'DPUCZDX8G-zcu104'
export_rt_mod_file = "vitis_ai.rtmod"
tvm_target  = 'llvm'
lib_kwargs  = {}

mod, params = relay.frontend.from_pytorch(script_module, shape_list)
mod = relay.transform.InferType()(mod)
mod["main"] = bind_params_by_name(mod["main"], params)

desired_layouts = {'nn.conv2d_transpose': ['NHWC','default']}
seq = tvm.transform.Sequential([relay.transform.RemoveUnusedFunctions(),
                                relay.transform.ConvertLayout(desired_layouts),
                                relay.transform.FoldConstant()])
with tvm.transform.PassContext(opt_level=3,disabled_pass=['FoldSacleAxis']):
    mod = seq(mod)

mod = partition_for_vitis_ai(mod, params, dpu=target)

desired_layouts = {'nn.conv2d_transpose': ['NCHW','default']}
seq = tvm.transform.Sequential([relay.transform.RemoveUnusedFunctions(),
                                relay.transform.ConvertLayout(desired_layouts),
                                relay.transform.FoldConstant()])
with tvm.transform.PassContext(opt_level=3):
    mod = seq(mod)

export_rt_mod_file = os.path.join(os.getcwd(), 'vitis_ai.rtmod')
build_options = {
    'dpu': target,
    'export_runtime_module': export_rt_mod_file
}
with tvm.transform.PassContext(opt_level=3, config={'relay.ext.vitis_ai.options': build_options}):   
	lib = relay.build(mod, tvm_target, params=params)

InferenceSession = graph_runtime.GraphModule(lib["default"](tvm.cpu()))
px_quant_size = 128

quant_files = [os.path.join(QUANT_DIR, f) for f in os.listdir(QUANT_DIR)
             if f.endswith(('JPEG', 'jpg', 'png'))][:px_quant_size]

def inputs_func(img_files: List[str]):
    inputs = []
    for img_path in img_files:
        frame = Image.open(img_path)
        img = transform_image_torchvision_NCHW(frame, 550)
        
        inputs.append(img)
    return inputs

quant_images = inputs_func(quant_files)

for index in range(px_quant_size):
    InferenceSession.set_input(input_name, quant_images[index]) 
    InferenceSession.run() # <- Breaks here on first attempt

temp = utils.tempdir()
lib.export_library(temp.relpath("tvm_lib.so"))

tvm_target = tvm.target.arm_cpu('ultra96')
lib_kwargs = {
    'fcompile': contrib.cc.create_shared,
    'cc': "/usr/aarch64-linux-gnu/bin/ld"
}
build_options = {
        'load_runtime_module': export_rt_mod_file
}

with tvm.transform.PassContext(opt_level=3, config={'relay.ext.vitis_ai.options': build_options}):
    lib_dpuczdx8g = relay.build(mod, tvm_target, params=params)

lib_dpuczdx8g.export_library('tvm_dpu.so', **lib_kwargs)

del InferenceSession

Error:

Traceback (most recent call last):
  File "compile_dummy_deconvolution.py", line 124, in <module>
    InferenceSession.run() # <- Breaks here on first attempt
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/tvm-0.9.dev543+g0009a308d-py3.6-linux-x86_64.egg/tvm/contrib/graph_executor.py", line 208, in run
    self._run()
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/tvm-0.9.dev543+g0009a308d-py3.6-linux-x86_64.egg/tvm/_ffi/_ctypes/packed_func.py", line 237, in __call__
    raise get_last_ffi_error()
ValueError: ValueError: could not broadcast input array from shape (1,1100,1100,3) into shape (1,1101,1101,3)

FYI: Seems to be issue with strides

[Yolact][Pytorch Frontend][Paritioning Issue] Yolact - Instance segmentation model compilation issue

https://github.com/Ma-Dan/yolact/tree/onnx - Ma-Dan version of yolact is onnx exportable (hope its good to JIT trace), tried this with pytorch frontend but getting segmentation fault at partition_for_vitis_ai(mod, params, dpu=target) as below (debug logs enabled - can post full log in file if needed)

DEBUG:pyxir:-- -- Sweep transpose: bX: ['moved_moved_nn_conv2d_NHWC-NCHW-94241211375472'], X: nn.relu-94240959460784, tX: ['nn_conv2d-94241211375472']
DEBUG:pyxir:-- Visit: moved_moved_moved_moved_transpose-94241201609008
-- -- for opt: SweepTransposesFlowDirection
DEBUG:pyxir:-- Visit: nn_bias_add-94241211132064
-- -- for opt: SweepTransposesFlowDirection
DEBUG:pyxir:-- -- Sweep transpose: bX: ['moved_moved_moved_moved_transpose-94241201609008'], X: nn_bias_add-94241211132064, tX: ['nn.relu-94241201608720']
INFO:pyxir:Writing graph visualization to after_partitioning_sweep_transposes.png
Fatal Python error: Segmentation fault

Current thread 0x00007f8944951740 (most recent call first):
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/tvm-0.8.dev1859+g627e92e7c-py3.6-linux-x86_64.egg/tvm/ir/transform.py", line 161 in __call__
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/tvm-0.8.dev1859+g627e92e7c-py3.6-linux-x86_64.egg/tvm/relay/op/contrib/vitis_ai.py", line 191 in partition_for_vitis_ai
  File "compile_yoloact_vitisai.py", line 226 in <module>
Segmentation fault (core dumped)

To JIT trace yoloact model:

def do_trace(model, in_size=100):
    model_trace = torch.jit.trace(model, torch.rand(1, 3, in_size, in_size))
    model_trace.eval()
    return model_trace

from yolact import Yolact
from data import cfg, set_cfg, set_dataset
set_cfg('yolact_resnet50' + '_config')
in_size = 550
inp = torch.rand(1, 3, in_size, in_size)

model = Yolact()
model.load_weights("weights/yolact_resnet50_54_800000.pth")
model.eval()
with torch.no_grad():
     out = model(inp)
     script_module = do_trace(model, in_size=550)

Please refer: https://discuss.tvm.apache.org/t/frontend-pytorch-compile-yolact-for-xilinx-hardware-zcu104/11909/5?u=abdulazizm

Question about onnxruntime execution on edge

Hello everyone,

I've seen the commit "Create DPUCZDX8G (zcu104, zcu102, SOM and Ultra96) VART flow" and wanted to ask that
Is it possible to use onnxruntime on edge devices with this commit?

Tensorflow Yolov3 compiles but killed while loading in EDGE device using tvm.runtime.load_module()

Used the same script and environment as mentioned by @jornt-xilinx here: https://discuss.tvm.apache.org/t/annotation-error-with-vitis-ai-in-tvm/8690/19?u=abdulazizm

Can able to successfully compile the lib_dpu_arm.so but couldnt load in ZCU104.

root@pynq:/home/xilinx# python3 run_tf_yolo.py
Mounting tvm runtime library
Killed
root@pynq:/home/xilinx# 

This is the code I use. Not sure if I missed anything. I could able to load deeplabv3 based on pytorch. Hope there shoulnot be any changes needed wrt Pytorch vs Tensorflow framework in runtime code.

############################################################
## Load TVM - DPU runtime module
############################################################
print("Mounting tvm runtime library")
lib_path  = os.path.join("/home/xilinx/yolov3_libs/tvm_dpu_arm.so")
lib = tvm.runtime.load_module(lib_path)
print("TVM runtime mount successful")
mod = graph_executor.GraphModule(lib["default"](tvm.cpu()))

Thanks,
Abdul.

Relay_Op error when compiling a model

Hi,

I started an issue in tvm repository, apache/tvm#8683 but I think that the correct place for fixing it is here.

I am only pointing out which is the error, I am having a

AttributeError: <class 'tvm.tir.expr.Any'> has no attribute value

And after adding debug traces I have figured out that the problem comes from this RelayOp expression

DEBUG:pyxir:RelayOp:
DEBUG:pyxir:-- op_name: RelayOp-94191981978496
DEBUG:pyxir:-- expr: dyn.strided_slice

I am looking at the code and I am seeing that there are two #TODO comments there https://github.com/Xilinx/pyxir/blob/master/python/pyxir/frontend/tvm/relay_tools/relay_l0_expr_and_others.py#L429-L446.

And the problem comes with this:

ty = expr.checked_type
.
.
.
relay_shape = TensorShape([int(s.value) for s in list(ty.shape)])
  • expr is:
DEBUG:pyxir:-- expr: free_var %inputs: Tensor[(1, 3, 416, 416), float32];
dyn.strided_slice(%inputs, meta[relay.Constant][0] /* ty=Tensor[(4), int64] */, meta[relay.Constant][1] /* ty=Tensor[(4), int64] */, meta[relay.Constant][2] /* ty=Tensor[(4), int64] */, begin=None, end=None, strides=None, axes=None) /* ty=Tensor[(?, ?, ?, ?), float32] */
  • expr.checked_type:
DEBUG:pyxir:-- expr checked_type: Tensor[(?, ?, ?, ?), float32]
  • expr.type_args:
DEBUG:pyxir:-- expr.type_args: [TensorType([1, 3, 416, 416], float32), TensorType([4], int64), TensorType([4], int64), TensorType([4], int64)]

It seems that doesn't like the [?, ?, ?, ?] list..

How do you fix this?

Best regards,

Jorge

Pytorch's ConvTranspose2d supported in DPU but accuracy degrades significantly. Is it expected?

Faced issue during compilation using Apache TVM flow. Below code helps to have conv2d_transpose onto mod['tvmgen_default_vitis_ai_main_0'] but accuracy degrades significantly (maybe due to unexpected weight transpose happens during desired layout transformation). It works great if we don't have conv2d_transpose in desired layout dict or force to have 'NCHW' layout

desired_layouts = {
                  'nn.conv2d': ['NHWC', 'default'], 
                  'image.resize2d': ['NHWC'], 
                  'nn.max_pool2d':['NHWC'], 
                  'nn.conv2d_transpose': ['NCHW','default'],
                  }

Tried 'nn.conv2d_transpose': ['NCHW','OIHW'] & 'nn.conv2d_transpose': ['NCHW','HWIO'] but no luck. And not sure if it is a known bug

@jornt-xilinx

Compiling pyxir error in py_base.cpp with std::regex_replace

Hi

Trying to compile pyxir (commit 7d73925, Version bump to v0.1.6), I get the error:

[ 4%] Building CXX object CMakeFiles/pyxir.dir/src/pyxir/ffi/py_base.cpp.o
In file included from /home/centos/pyxir/include/pyxir/graph/xgraph.hpp:26:0,
from /home/centos/pyxir/include/pyxir/pyxir.hpp:21,
from /home/centos/pyxir/src/pyxir/ffi/py_base.cpp:23:
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp: In function ‘std::string pyxir::stringify(const string&)’:
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp:37:55: error: no matching function for call to ‘regex_replace(const string&, std::regex&, const char [2])’
std::string s2 = std::regex_replace(s, vowel_re, "-");

The command "sudo python3 setup.py install" failed so I tried the direct command
"cmake --build . --config Release" to get more details. Same issue than py_base.cpp:23: with frontend/onnx.cpp:23

Please advise.

Details below:


$ cmake --configure .
-- The C compiler identification is GNU 4.8.5
-- The CXX compiler identification is GNU 4.8.5
-- Check for working C compiler: /usr/bin/cc
-- Check for working C compiler: /usr/bin/cc - works
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Detecting C compile features
-- Detecting C compile features - done
-- Check for working CXX compiler: /usr/bin/c++
-- Check for working CXX compiler: /usr/bin/c++ - works
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Detecting CXX compile features
-- Detecting CXX compile features - done
-- Found PythonInterp: /usr/bin/python3.6 (found suitable version "3.6.8", minimum required is "3.6")
-- Found PythonInterp: /usr/bin/python3.6 (found version "3.6.8")
-- Found PythonLibs: python3.6m
-- pybind11 v2.4.dev4
-- Configuring done
-- Generating done
-- Build files have been written to: /home/centos/pyxir


$ cmake --build . --config Release
[ 4%] Building CXX object CMakeFiles/pyxir.dir/src/pyxir/ffi/py_base.cpp.o
In file included from /home/centos/pyxir/include/pyxir/graph/xgraph.hpp:26:0,
from /home/centos/pyxir/include/pyxir/pyxir.hpp:21,
from /home/centos/pyxir/src/pyxir/ffi/py_base.cpp:23:
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp: In function ‘std::string pyxir::stringify(const string&)’:
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp:37:55: error: no matching function for call to ‘regex_replace(const string&, std::regex&, const char [2])’
std::string s2 = std::regex_replace(s, vowel_re, "-");
^
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp:37:55: note: candidates are:
In file included from /usr/include/c++/4.8.2/regex:62:0,
from /home/centos/pyxir/include/pyxir/graph/../common/util.hpp:21,
from /home/centos/pyxir/include/pyxir/graph/xgraph.hpp:26,
from /home/centos/pyxir/include/pyxir/pyxir.hpp:21,
from /home/centos/pyxir/src/pyxir/ffi/py_base.cpp:23:
/usr/include/c++/4.8.2/bits/regex.h:2162:5: note: template<class _Out_iter, class _Bi_iter, class _Rx_traits, class _Ch_type> _Out_iter std::regex_replace(_Out_iter, _Bi_iter, _Bi_iter, const std::basic_regex<_Ch_type, _Rx_traits>&, const std::basic_string<_Ch_type>&, std::regex_constants::match_flag_type)
regex_replace(_Out_iter __out, _Bi_iter __first, _Bi_iter __last,
^
/usr/include/c++/4.8.2/bits/regex.h:2162:5: note: template argument deduction/substitution failed:
In file included from /home/centos/pyxir/include/pyxir/graph/xgraph.hpp:26:0,
from /home/centos/pyxir/include/pyxir/pyxir.hpp:21,
from /home/centos/pyxir/src/pyxir/ffi/py_base.cpp:23:
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp:37:55: note: deduced conflicting types for parameter ‘_Bi_iter’ (‘std::basic_regex’ and ‘const char*’)
std::string s2 = std::regex_replace(s, vowel_re, "-");
^
In file included from /usr/include/c++/4.8.2/regex:62:0,
from /home/centos/pyxir/include/pyxir/graph/../common/util.hpp:21,
from /home/centos/pyxir/include/pyxir/graph/xgraph.hpp:26,
from /home/centos/pyxir/include/pyxir/pyxir.hpp:21,
from /home/centos/pyxir/src/pyxir/ffi/py_base.cpp:23:
/usr/include/c++/4.8.2/bits/regex.h:2182:5: note: template<class _Rx_traits, class _Ch_type> std::basic_string<_Ch_type> std::regex_replace(const std::basic_string<_Ch_type>&, const std::basic_regex<_Ch_type, _Rx_traits>&, const std::basic_string<_Ch_type>&, std::regex_constants::match_flag_type)
regex_replace(const basic_string<_Ch_type>& __s,
^
/usr/include/c++/4.8.2/bits/regex.h:2182:5: note: template argument deduction/substitution failed:
In file included from /home/centos/pyxir/include/pyxir/graph/xgraph.hpp:26:0,
from /home/centos/pyxir/include/pyxir/pyxir.hpp:21,
from /home/centos/pyxir/src/pyxir/ffi/py_base.cpp:23:
/home/centos/pyxir/include/pyxir/graph/../common/util.hpp:37:55: note: mismatched types ‘const std::basic_string<_Ch_type>’ and ‘const char [2]’
std::string s2 = std::regex_replace(s, vowel_re, "-");
^
gmake[2]: *** [CMakeFiles/pyxir.dir/src/pyxir/ffi/py_base.cpp.o] Error 1
gmake[1]: *** [CMakeFiles/pyxir.dir/all] Error 2
gmake: *** [all] Error 2

[Yolact][ONNX Frontend][Paritioning Issue] Yolact - Instance segmentation model compilation issue

Related to #85

Exported Yolact model to ONNX and tried compiling with ONNX frontend

onnx_model = onnx.load('yolact.onnx')
onnx.checker.check_model(onnx_model)

With mod = relay.transform.DynamicToStatic()(mod) just before mod = partition_for_vitis_ai(mod, params, dpu=target),

File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/pyxir-0.3.2-py3.6-linux-x86_64.egg/pyxir/graph/layer/xlayer_factory.py", line 43, in factory_func
    d = register_func(attrs, in_xlayers)
File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/pyxir-0.3.2-py3.6-linux-x86_64.egg/pyxir/graph/ops/l1_basic_nn.py", line 630, in sub
    shape = TensorShape(get_numpy_broadcasted_shape(lX.shapes[:], rX.shapes[:]))
File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/pyxir-0.3.2-py3.6-linux-x86_64.egg/pyxir/shapes/tools.py", line 39, in get_numpy_broadcasted_shape
    " {} and {}".format(shape_a, shape_b))
ValueError: Invalid shapes for broadcasted additions: [-1, 18225, 81] and [1, 19248, 1]

FYI:
Without mod = relay.transform.DynamicToStatic()(mod) before mod = partition_for_vitis_ai(mod, params, dpu=target)

  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/pyxir-0.3.2-py3.6-linux-x86_64.egg/pyxir/frontend/tvm/relay_tools/relay_l0_expr_and_others.py", line 437, in <listcomp>
    relay_shape = TensorShape([int(s.value) for s in list(ty.shape)])
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/tvm-0.8.dev1859+g627e92e7c-py3.6-linux-x86_64.egg/tvm/runtime/object.py", line 67, in __getattr__
    raise AttributeError("%s has no attribute %s" % (str(type(self)), name))
AttributeError: tir.Any object has no attributed value
During handling of the above exception, another exception occurred:

AttributeError: <class 'tvm.tir.expr.Any'> has no attribute value

With pytorch frontend, compilation goes up to 3rd step, but with ONNX frontend struck in 1st step

  • RELAY IR TO PYXIR
  • LAYOUT TRANSFORMATION PASS
  • GRAPH IMPORTED FROM RELAY

Tensorflow pad error when compiling xgraph

Hey @jornt-xilinx !

So I've managed to quantize multiple subgraphs in a xgraph and now i'm trying to compile these subgraphs to instructions for the DPU. However the following error happens:

Traceback (most recent call last):
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/bin/xnnc-run", line 33, in <module>
    sys.exit(load_entry_point('xnnc==1.3.0', 'console_scripts', 'xnnc-run')())
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/__main__.py", line 194, in main
    normal_run(args)
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/__main__.py", line 178, in normal_run
    in_shapes=in_shapes if len(in_shapes) > 0 else None,
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/xconverter.py", line 131, in run
    xmodel = CORE.make_xmodel(model_files, model_type, _layout, in_shapes)
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/core.py", line 104, in make_xmodel
    model_files, layout, in_shapes=in_shapes, model_type=model_t
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/translator/tensorflow_translator.py", line 97, in to_xmodel
    model_name, raw_nodes, layout, in_shapes, model_fmt, model_type
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/translator/tensorflow_translator.py", line 161, in create_xmodel
    xmodel = cls.__create_xmodel_from_tf1(name, layers, layout, in_shapes)
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/translator/tensorflow_translator.py", line 267, in __create_xmodel_from_tf1
    xmodel_name, layout, layers, const_layer_dict, super_const_dict, in_shapes
  File "/opt/vitis_ai/conda/envs/vitis-ai-tensorflow/lib/python3.6/site-packages/xnnc/translator/tensorflow_translator.py", line 1991, in __generate_xmodel
    ), f"[ERROR] tf pad op requires two inputs: actual: {len(bottom)}"
AssertionError: [ERROR] tf pad op requires two inputs: actual: 1

Do you have idea why this might happen?

Resnet-18 example on edge DPUCZDX8G-zcu102 meets "Segmentation fault"

Firstly, I refered to the TVM Vitis AI documentation to set up the host and edge environment.
Then I executed the edge_resnet_18_host.py script on a host x86 machine to set up and compile a ResNet 18 model for DPU execution and saved a lib_dpu.so file.
When I run the edge_resnet_18_board.py script with the lib_dpu.so file on the ZCU102, but met the "Segmentation fault".

I carefully followed https://tvm.apache.org/docs/deploy/vitis_ai.html multiple times with the same error at the end.

Compilation failing on ZCU104 on top PYNQ

trying to build master/default branch Pyxir with DPU-PYNQ (2.6 SD card image) for TVM workflow.

Cant able to build : using sudo python3 setup.py install --use_vai_rt_dpuczdx8g command
but -> sudo python3 setup.py install this command builds but guess both are not same. Any suggestions?

In file included from /root/vai_1.3_tvm/tvm/pyxir/src/pyxir/runtime/backends/vai_rt/vai_api/dpu_func.cpp:23: /root/vai_1.3_tvm/tvm/pyxir/src/pyxir/runtime/backends/vai_rt/vai_api/dpu_func.hpp:20:10: fatal error: dpu_runner.hpp: No such file or directory 20 | #include <dpu_runner.hpp> | ^~~~~~~~~~~~~~~~ compilation terminated. CMakeFiles/pyxir.dir/build.make:326: recipe for target 'CMakeFiles/pyxir.dir/src/pyxir/runtime/backends/vai_rt/vai_api/dpu_func.cpp.o' failed make[2]: *** [CMakeFiles/pyxir.dir/src/pyxir/runtime/backends/vai_rt/vai_api/dpu_func.cpp.o] Error 1 make[2]: *** Waiting for unfinished jobs.... CMakeFiles/Makefile2:67: recipe for target 'CMakeFiles/pyxir.dir/all' failed make[1]: *** [CMakeFiles/pyxir.dir/all] Error 2 Makefile:129: recipe for target 'all' failed make: *** [all] Error 2 Traceback (most recent call last): File "setup.py", line 291, in <module> zip_safe=False File "/usr/lib/python3/dist-packages/setuptools/__init__.py", line 129, in setup return distutils.core.setup(**attrs) File "/usr/lib/python3.6/distutils/core.py", line 148, in setup dist.run_commands() File "/usr/lib/python3.6/distutils/dist.py", line 955, in run_commands self.run_command(cmd) File "/usr/lib/python3.6/distutils/dist.py", line 974, in run_command cmd_obj.run() File "/usr/lib/python3/dist-packages/setuptools/command/install.py", line 67, in run self.do_egg_install() File "/usr/lib/python3/dist-packages/setuptools/command/install.py", line 109, in do_egg_install self.run_command('bdist_egg') File "/usr/lib/python3.6/distutils/cmd.py", line 313, in run_command self.distribution.run_command(command) File "/usr/lib/python3.6/distutils/dist.py", line 974, in run_command cmd_obj.run() File "/usr/lib/python3/dist-packages/setuptools/command/bdist_egg.py", line 172, in run cmd = self.call_command('install_lib', warn_dir=0) File "/usr/lib/python3/dist-packages/setuptools/command/bdist_egg.py", line 158, in call_command self.run_command(cmdname) File "/usr/lib/python3.6/distutils/cmd.py", line 313, in run_command self.distribution.run_command(command) File "/usr/lib/python3.6/distutils/dist.py", line 974, in run_command cmd_obj.run() File "/usr/lib/python3/dist-packages/setuptools/command/install_lib.py", line 24, in run self.build() File "/usr/lib/python3.6/distutils/command/install_lib.py", line 109, in build self.run_command('build_ext') File "/usr/lib/python3.6/distutils/cmd.py", line 313, in run_command self.distribution.run_command(command) File "/usr/lib/python3.6/distutils/dist.py", line 974, in run_command cmd_obj.run() File "setup.py", line 161, in run self.build_extension(ext) File "setup.py", line 206, in build_extension cwd=self.build_temp) File "/usr/lib/python3.6/subprocess.py", line 291, in check_call raise CalledProcessError(retcode, cmd) subprocess.CalledProcessError: Command '['cmake', '--build', '.', '--config', 'Release', '--', '-j4']' returned non-zero exit status 2.

Ultra96 v2: [DNNDK] DPU configuration mismatch

Hi, I tried the pyxir/examples/tvm/, and I almost succeeded. But when I ran the program on the ultra96 board, I got the error.
image

I checked the dpu version on the host and the board, I found they were both v1.4.1.
host
image
board
image
I think my situation is really like this issue , but I don't know how to fix it. I know using the vai_c_ to compile the model needs an 'arch.json', I guess lacking the file for ultra96 may cause the isssue, but I don't know how pyxir uses it.

By the way, I didn't use the PYNQ2.6-Z2 image for ultra96v2, which the tvm doc says, I used PYNQ2.6-Ultra96V2, I think they were different boards, and I didn't boot successfully using the PYNQ2.6-Z2 image when I try.
image
image

I would appreciate it very much, if you can help me solve the problem.

NotImplementedError: Relay Parametric ReLU to XLayer not implemented

I'm trying to compile an MXNet model to XIR model but facing this error
NotImplementedError: Relay Parametric ReLU to XLayer not implemented
The model can be downloaded from here
Some useful script to import the model -> modify existing one from vitis-ai tvm tutorial here:

import mxnet
sym, arg_params, aux_params = mx.model.load_checkpoint('model', 0)
input_shape = (1,3,112,112)
mod, params = relay.frontend.from_mxnet(sym, shape_dict, arg_params=arg_params, aux_params=aux_params)

Everything run fine until partition_for_vitis_ai() and the error occurred.
I tried to compile it for both ZCU104 and KV260 (SOM on vitis version 1.3), but same error occur.
A quick search lead me to pyxir/python/pyxir/frontend/tvm/relay_tools/relay_l3_math_and_transform.py, where the error is raised. And pyxir/python/pyxir/graph/ops which tells me that PReLU is supported.
Can anyone support me with it? Thanks so much!

P/s: I know that PReLU is not supported by vai_c & DPU according to vitis ai user guide

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