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View Code? Open in Web Editor NEWCode to perform standard DSP functions, such as Biquads, FIRs, sample rate conversion
Home Page: http://github.xcore.com/sc_dsp_filters/
License: Other
Code to perform standard DSP functions, such as Biquads, FIRs, sample rate conversion
Home Page: http://github.xcore.com/sc_dsp_filters/
License: Other
ok, I havn't tested the code myself yet, but B should typically be calculated before A to prevent overflow, since B includes the attenuation that compensates for the gain in the recursive part A. The opposite makes the filter unnecessary sensitive to overflow. Eg. Y x 0.01x100 will not overflow, but Y x 100x0.01 might overflow.
Thus I would recommend the Transposed-Direct-Form-II implementation
https://ccrma.stanford.edu/~jos/fp/img1144.png
Try this as app_example_fir:
https://gist.github.com/939921
FIRfilt(0:7,0:7) = 0 , 0 , 1 , 1 +(1+2) , 1+ (1+2) + (1+2+3), ... = 0 , 0 , 1 , 4 , 10 , 20 , 35 , 56 ...
The FIR module gives something very different.
It seems like the cascaded biquad doesn't work in the trivial case when DBS is set to 1. This is useful for filters where the centre frequency changes with constant amplitude. Those are implemented by pregenerating coefficients or generating them on the fly. The cascaded biquad then operates with constant amplitude.
Add jar file for parameter generation so that anybody can run Makefiles.
From the community docs "Follow the Coding Conventions"
What is the convention in this module ?
Pure XC or ASM only !? , eg. not using inline asm in XC or XC mixed with C and stuff like that ?
What is the convention for sharing the coef. array with other threads (as updating the filters on the fly or using adaptive filters) avoiding the XC par. usage rule.
Hi
There was an request on the xcore about running 3000 taps @ 96 kHz on XMOS.
Since that could fit into an XMOS G4 with 90%burden + overhead i had to test a little.
Depending on how it is written 1 sec of data takes 913-928 ms to calc. on 16 threads.
I know it was written on a todolist somewhere with distributed FIR.
An example with distributed FIR on 1 core and another example with several cores would be great.
Since people are afraid of the distribution programming. (You need some ASM or C).
Is it interesting to fit it in this dsp_filters or another?
This one "must" run with channels for the data, but I use unified memory on each core for the taps and old data states.
I can test it on L1 and G4, but I haven't any L2 ... yet.
In row 3-5 in the biquadAsm.S, it is written nntack... as
.globl biquadAsm.nntackwords
.linkset biquadAsm.nntackwords,NWORDS
It should be nstack or !?
app_example_biquad doesn't build due to a missing file. (At least it is missing after clean)
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