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Simple implementation of PCIE4C-based pcie transfer on Xilinx Ultrascale+ FPGAs
Home Page: https://blog.csdn.net/qq_45434284/category_12609758.html
License: GNU General Public License v3.0
SystemVerilog 41.12%
Tcl 53.84%
Makefile 0.25%
C 4.79%
sv_pcie's Introduction
Simple implementation of PCIE4C-based PCIe transfer on Xilinx Ultrascale+ FPGAs
- PCIe Memory Read/Write support
- PCIe DMA Read/Write support
- Legacy/MSI/MSI-X interrupt support
![block diagram](doc/diagram.png)
![resources](doc/resources.png)
- RTL Design tested on Xilinx Ultrascale+HBM VCU128 FPGA development board.
- Driver tested on RHEL (Red Hat Enterprise Linux) 8.9 with kernel version 4.18.0-477.15.1.el8_8.x86_64
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