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image-processing

Image Processing Toolbox in Verilog using Basys3 FPGA

integrated-circuit-textbooks

Collect some IC textbooks for learning.

isp-pipeline-hdrplus

Denoise,HDR,Isppipeline,Image-processing(图形处理),camera, Isp ,HDRplus

isp_uvm

A Framework for Design and Verification of Image Processing Applications using UVM

jtag

fpga jtag hardware

kintex-7-xc7k325-pcb

基于Kintex-7 XC7K325T的高性能FPGA功能验证板

kryon

libusb-dslogic

luna

a USB multitool + Amaranth HDL framework for monitoring, hacking, and developing USB devices

lz4-decompressor-verilog

Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language

mipi_csi_2

netfpga-sume-live

nvmecha

NVMe Controller featuring Hardware Acceleration

openheat

openirv

Open-source thermal camera project

openlane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

opennoc

opentsn3.4

OpenTSN3.4开源项目的新特性：（1）交换平面深度解耦，硬件代码由TSS（时间敏感交换），HCP（硬件控制点）和OSMAC（Opensync MAC）实现。（2）集成了Opensync开源实现，支持802.1AS和AS6802两种时间同步协议；（3）集成了TSN硬件仿真工具OpenEmulator，用户可在仿真环境下运行OpenTSN3.4交换机、网卡、控制器和opensync同步软件

pcileech-fpga

FPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software

pronoc

Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).

qwidgetdemo

Qt编写的一些开源的demo，预计会有100多个，一直持续更新完善，代码简洁易懂注释详细，每个都是独立项目，非常适合初学者，代码随意传播使用，拒绝打赏和捐赠，欢迎留言评论！

realtime-bicubic-16x-superresolution-ip

APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS

sata3_host_controller

It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.

superscalar-riscv-cpu

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

system-bus-design-verilog

This is a Multi master Multi slave compatible system bus design modeled using verilog. This is much like AMBA AHB Specification

tech-doc

Design Docs for KU5P Card

thunderbolt3

A module for TBT3

thunderscope

ThunderScope GitHub Repo

trilium

=======Trilium中文Wiki.=========最近更新日期：2022-02-03

usb-jtag-spi

Single-chip solution for Hi-speed USB2.0(480Mbps) JTAG/SPI Debugger based on RISC-V MCU CH32V30x/CH32V20x