Comments (23)
JEETIITGN
commented on August 16, 2024
1
Thank you very much, Taichi. I appreciate your support. I can simulate your "tnoc" router. Just need to figure out what the used variables do.
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JEETIITGN
commented on August 16, 2024
I am trying to look into your design. How can I simulate your NoC router? Can I do it using Xilinx Vivado?
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taichi-ishitani
commented on August 16, 2024
Hi @JEETIITGN ,
Thank you for having an interest in my NoC core.
The sample test bench is built on SystemVerilog and UVM.
You need to use one of following simulators If you want to use the sample test bench.
- Synopsys VCS (confirmed)
- Cadence Xcelium (confirmed)
- Mentor Questa (not yet confirmed)
- Aldec Riviera-PRO (not yet confirmed)
Can I do it using Xilinx Vivado?
I'm not sure Vivado simulator supports UVM but I think Vivado simulator may not support UVM.
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JEETIITGN
commented on August 16, 2024
Dear Taichi-Ishitani,
Thanks for responding, I figured out a way to simulate your code in VCS.
But unfortunately, I received an error in one of your files named "
tnoc/rtl/config/tnoc_config_pkg.sv". Can you please look into these files.
The error that I received was:
>vcs -f compile.f (the command that I executed)
>
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/config/
tnoc_config_pkg.sv'
Error-[SE] Syntax error
Following verilog source has syntax error :
"/home/jeet/Async_Priority/tnoc/rtl/config/tnoc_config_pkg.sv", 4: token is
';'
package tnoc_config_pkg;
^
1 error
Jitesh Sah (18210103)
M.Tech. Microelectronics and VLSI Design,
Electrical Engineering
IIT Gandhinagar
…On Sat, Sep 14, 2019 at 6:00 PM Taichi Ishitani ***@***.***> wrote:
Hi @JEETIITGN <https://github.com/JEETIITGN> ,
Thank you for having an interest in my NoC core.
The sample test bench is built on SystemVerilog and UVM.
You need to use one of following simulators If you want to use the sample
test bench.
- Synopsys VCS
- Cadence IES/Xcelium
- Mentor Questa
- Aldec Riviera-PRO
I have already confirmed that VCS and Xcelium simulators can be used.
Can I do it using Xilinx Vivado?
I'm not sure Vivado simulator supports UVM but I think Vivado simulator
may not support UVM.
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taichi-ishitani
commented on August 16, 2024
Following procedures are how to run simulation.
Preparation
Run command below to clone sub-modules on which the NoC core depends.
$ ./setup_submodules.sh
Run Simulation
I have already prepared Makefile to run simulation. You only have to hit make command on work directories listed below.
- sim/router_data_width_64_vc_2
- for router
- sim/fabric_data_width_64_vc_2
- for Mesh fabric
- sim/axi_adapter_data_width_64
- for fabric + AXI Adapter
Example:
$ cd sim/fabric_data_width_64_vc_2
$ make
Then, work directories for each tests will be created and result files (log, wave dump, etc.) will be output to the work directories.
If you want to dump wave forms you need to add DUMP=vpd or DUMP=fsdb to make command.
VPD Format:
$ make DUMP=vpd
FSDB Format:
$ make DUMP=fsdb
You may need to clean simulation binary before running simulation with wave dump.
$ make clean; make DUMP=fsdb
If you want to know details of simulation command please refer following Makefiles.
- https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/common.mk?ts=2
- https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/vcs.mk?ts=2
If you need more details please let me know.
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JEETIITGN
commented on August 16, 2024
Dear Taichi,
Thank you very much for your help. I would try your recipes and see if I can make it to work. CC(ed) is my fellow who is working in the same domain.
Thanks and regards,
Jitesh Sah
M.Tech. EE
IIT GANDHINAGAR INDIA
Sent from my iPad
… On 14-Sep-2019, at 6:43 PM, Taichi Ishitani ***@***.***> wrote:
Following procedures are how to run simulation.
Preparation
Run command below to clone sub-modules on which the NoC core depends.
$ ./setup_submodules.sh
Run Simulation
I have already prepared Makefile to run simulation. You only have to hit make command on work directories listed below.
sim/router_data_width_64_vc_2
for router
sim/fabric_data_width_64_vc_2
for Mesh fabric
sim/axi_adapter_data_width_64
for fabric + AXI Adapter
Example:
$ cd sim/fabric_data_width_64_vc_2
$ make
Then, work directories for each tests will be created and result files (log, wave dump, etc.) will be output to the work directories.
If you want to dump wave forms you need to add DUMP=vpd or DUMP=fsdb to make command.
VPD Format:
$ make DUMP=vpd
FSDB Format:
$ make DUMP=fsdb
You may need clean simulation binary before running simulation with wave dump.
$ make clean; make DUMP=fsdb
If you want to know details of simulation command please refer following Makefiles.
https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/common.mk?ts=2
https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/vcs.mk?ts=2
If you need more details please let me know.
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You are receiving this because you were mentioned.
Reply to this email directly, view it on GitHub, or mute the thread.
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JEETIITGN
commented on August 16, 2024
Dear Taichi,
I tried to simulate your tonic router, but I am facing some issues. First, the submodule clone is not working because of some public license issue. Second, I cloned three of your submodules.
1) rtf/bcm
2) env/axi_vip
3) env/tue
The tree of you tonic directory is :After It I tried simulating it using VCS, using the steps you mentioned previously.
But I am receiving errors which I am unable to rectify. The dump of the error is :
Looking forward to receive a solution of the problem.
Thanks and regards
Jitesh Sah
M.Tech. EE
IIT GANDHINAGAR, INDIA
On 14-Sep-2019, at 8:24 PM, JITESH SAH 18210103 ***@***.***> wrote:
Dear Taichi,
Thank you very much for your help. I would try your recipes and see if I can make it to work. CC(ed) is my fellow who is working in the same domain.
Thanks and regards,
Jitesh Sah
M.Tech. EE
IIT GANDHINAGAR INDIA
Sent from my iPad
On 14-Sep-2019, at 6:43 PM, Taichi Ishitani ***@***.*** ***@***.***>> wrote:
> Following procedures are how to run simulation.
>
> Preparation
>
> Run command below to clone sub-modules on which the NoC core depends.
>
> $ ./setup_submodules.sh
> Run Simulation
>
> I have already prepared Makefile to run simulation. You only have to hit make command on work directories listed below.
>
> sim/router_data_width_64_vc_2
> for router
> sim/fabric_data_width_64_vc_2
> for Mesh fabric
> sim/axi_adapter_data_width_64
> for fabric + AXI Adapter
> Example:
>
> $ cd sim/fabric_data_width_64_vc_2
> $ make
> Then, work directories for each tests will be created and result files (log, wave dump, etc.) will be output to the work directories.
>
> If you want to dump wave forms you need to add DUMP=vpd or DUMP=fsdb to make command.
>
> VPD Format:
>
> $ make DUMP=vpd
> FSDB Format:
>
> $ make DUMP=fsdb
> You may need clean simulation binary before running simulation with wave dump.
>
> $ make clean; make DUMP=fsdb
> If you want to know details of simulation command please refer following Makefiles.
>
> https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/common.mk?ts=2 <https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/common.mk?ts=2>
> https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/vcs.mk?ts=2 <https://github.com/taichi-ishitani/tnoc/blob/master/sim/common/vcs.mk?ts=2>
> If you need more details please let me know.
>
> —
> You are receiving this because you were mentioned.
> Reply to this email directly, view it on GitHub <#49?email_source=notifications&email_token=ALS4XZ7OZLQFYVUYSLU3SFLQJTPO7A5CNFSM4IWWH3QKYY3PNVWWK3TUL52HS4DFVREXG43VMVBW63LNMVXHJKTDN5WW2ZLOORPWSZGOD6W3SJI#issuecomment-531478821>, or mute the thread <https://github.com/notifications/unsubscribe-auth/ALS4XZ2O57NNHI7RMEO2K43QJTPO7ANCNFSM4IWWH3QA>.
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.
|-- compile_loc
|-- FIFO
| |-- csrc
| | |-- _18964_archive_1.so -> .//../simv.daidir//_18964_archive_1.so
| | |-- _20213_archive_1.so -> .//../simv.daidir//_20213_archive_1.so
| | |-- amcQwB.o
| | |-- archive.2
| | | |-- _18964_archive_1.a
| | | `-- _18964_archive_1.a.info
| | |-- cginfo.json
| | |-- cgproc.18964.json
| | |-- diag
| | |-- filelist
| | |-- filelist.cu
| | |-- filelist.dpi
| | |-- filelist.hsopt
| | |-- filelist.hsopt.llvm2_0.objs
| | |-- filelist.hsopt.objs
| | |-- filelist.pli
| | |-- hsim
| | |-- import_dpic.h
| | |-- incr.sdb
| | |-- Makefile
| | |-- Makefile.hsopt
| | |-- objs
| | | `-- amcQw_d.o
| | |-- _prev_archive_1.so -> .//../simv.daidir//_prev_archive_1.so
| | |-- _prev_cginfo.json
| | |-- product_timestamp
| | |-- rmapats.c
| | |-- rmapats.h
| | |-- rmapats.m
| | |-- rmapats_mop.o
| | |-- rmapats.o
| | |-- rmar0.h
| | |-- rmar.c
| | |-- rmar.h
| | |-- rmar_llvm_0_0.o
| | |-- rmar_llvm_0_1.o
| | |-- rmar.o
| | |-- SIM_l.o
| | |-- _vcs_const_SIM_0.incr.dat
| | |-- _vcs_etype_SIM_0.incr.dat
| | `-- vcspieces.incr
| |-- DVEfiles
| | |-- cmd_dve_sim.log
| | |-- dve_gui.log
| | |-- dve_gui.log.sml
| | |-- dve_history.log
| | |-- dve_qtwarnings.log
| | |-- dve_sim.log
| | `-- session.tcl
| |-- FIFO.cache
| | |-- compile_simlib
| | | |-- activehdl
| | | |-- ies
| | | |-- modelsim
| | | |-- questa
| | | |-- riviera
| | | |-- vcs
| | | `-- xcelium
| | `-- wt
| | |-- gui_handlers.wdf
| | |-- java_command_handlers.wdf
| | |-- project.wpc
| | |-- synthesis_details.wdf
| | |-- synthesis.wdf
| | |-- webtalk_pa.xml
| | `-- xsim.wdf
| |-- FIFO.hw
| | `-- FIFO.lpr
| |-- FIFO.ip_user_files
| | `-- README.txt
| |-- FIFO.runs
| | `-- synth_1
| | |-- fifo.dcp
| | |-- fifo.tcl
| | |-- fifo_utilization_synth.pb
| | |-- fifo_utilization_synth.rpt
| | |-- fifo.vds
| | |-- gen_run.xml
| | |-- htr.txt
| | |-- ISEWrap.js
| | |-- ISEWrap.sh
| | |-- project.wdf
| | |-- rundef.js
| | |-- runme.bat
| | |-- runme.log
| | |-- runme.sh
| | |-- __synthesis_is_complete__
| | |-- vivado.jou
| | `-- vivado.pb
| |-- FIFO.sim
| | `-- sim_1
| | |-- behav
| | | `-- xsim
| | | |-- compile.bat
| | | |-- compile.log
| | | |-- compile.sh
| | | |-- elaborate.bat
| | | |-- elaborate.log
| | | |-- elaborate.sh
| | | |-- fifo_behav.wdb
| | | |-- fifo.tcl
| | | |-- fifo_vlog.prj
| | | |-- glbl.v
| | | |-- simulate.bat
| | | |-- simulate.log
| | | |-- simulate.sh
| | | |-- TB_FIFO_behav.wdb
| | | |-- TB_FIFO.tcl
| | | |-- TB_FIFO_vlog.prj
| | | |-- TB_VECTORED_behav.wdb
| | | |-- TB_VECTORED.tcl
| | | |-- TB_VECTORED_vlog.prj
| | | |-- webtalk_10852.backup.jou
| | | |-- webtalk_10852.backup.log
| | | |-- webtalk_192.backup.jou
| | | |-- webtalk_192.backup.log
| | | |-- webtalk_3477.backup.jou
| | | |-- webtalk_3477.backup.log
| | | |-- webtalk_7844.backup.jou
| | | |-- webtalk_7844.backup.log
| | | |-- webtalk_7988.backup.jou
| | | |-- webtalk_7988.backup.log
| | | |-- webtalk.jou
| | | |-- webtalk.log
| | | |-- xelab.pb
| | | |-- xsim.dir
| | | | |-- fifo_behav
| | | | | |-- Compile_Options.txt
| | | | | |-- obj
| | | | | | |-- xsim_0.win64.obj
| | | | | | |-- xsim_1.c
| | | | | | `-- xsim_1.win64.obj
| | | | | |-- TempBreakPointFile.txt
| | | | | |-- webtalk
| | | | | | |-- usage_statistics_ext_xsim.html
| | | | | | |-- usage_statistics_ext_xsim.wdm
| | | | | | |-- usage_statistics_ext_xsim.xml
| | | | | | `-- xsim_webtalk.tcl
| | | | | |-- xsimcrash.log
| | | | | |-- xsim.dbg
| | | | | |-- xsimkernel.log
| | | | | |-- xsimk.exe
| | | | | |-- xsim.mem
| | | | | |-- xsim.reloc
| | | | | |-- xsim.rlx
| | | | | |-- xsim.rtti
| | | | | |-- xsimSettings.ini
| | | | | |-- xsim.svtype
| | | | | |-- xsim.type
| | | | | `-- xsim.xdbg
| | | | |-- TB_FIFO_behav
| | | | | |-- Compile_Options.txt
| | | | | |-- obj
| | | | | | |-- xsim_0.lnx64.o
| | | | | | |-- xsim_0.win64.obj
| | | | | | |-- xsim_1.c
| | | | | | |-- xsim_1.lnx64.o
| | | | | | `-- xsim_1.win64.obj
| | | | | |-- TempBreakPointFile.txt
| | | | | |-- webtalk
| | | | | | |-- usage_statistics_ext_xsim.html
| | | | | | |-- usage_statistics_ext_xsim.wdm
| | | | | | |-- usage_statistics_ext_xsim.xml
| | | | | | `-- xsim_webtalk.tcl
| | | | | |-- xsimcrash.log
| | | | | |-- xsim.dbg
| | | | | |-- xsimk
| | | | | |-- xsimkernel.log
| | | | | |-- xsimk.exe
| | | | | |-- xsim.mem
| | | | | |-- xsim.reloc
| | | | | |-- xsim.rlx
| | | | | |-- xsim.rtti
| | | | | |-- xsimSettings.ini
| | | | | |-- xsim.svtype
| | | | | |-- xsim.type
| | | | | `-- xsim.xdbg
| | | | |-- TB_VECTORED_behav
| | | | | |-- Compile_Options.txt
| | | | | |-- obj
| | | | | | |-- xsim_0.win64.obj
| | | | | | |-- xsim_1.c
| | | | | | `-- xsim_1.win64.obj
| | | | | |-- TempBreakPointFile.txt
| | | | | |-- webtalk
| | | | | | |-- usage_statistics_ext_xsim.html
| | | | | | |-- usage_statistics_ext_xsim.wdm
| | | | | | |-- usage_statistics_ext_xsim.xml
| | | | | | `-- xsim_webtalk.tcl
| | | | | |-- xsimcrash.log
| | | | | |-- xsim.dbg
| | | | | |-- xsimkernel.log
| | | | | |-- xsimk.exe
| | | | | |-- xsim.mem
| | | | | |-- xsim.reloc
| | | | | |-- xsim.rlx
| | | | | |-- xsim.rtti
| | | | | |-- xsimSettings.ini
| | | | | |-- xsim.svtype
| | | | | |-- xsim.type
| | | | | `-- xsim.xdbg
| | | | |-- xil_defaultlib
| | | | | |-- fifo.sdb
| | | | | |-- glbl.sdb
| | | | | |-- @t@b_@f@i@[email protected]
| | | | | |-- @t@b_@v@e@c@t@o@r@[email protected]
| | | | | |-- vector_array.sdb
| | | | | `-- xil_defaultlib.rlx
| | | | `-- xsim.svtype
| | | |-- xsim.ini
| | | |-- xvlog.log
| | | `-- xvlog.pb
| | `-- synth
| | `-- func
| | `-- xsim
| | |-- compile.bat
| | |-- compile.log
| | |-- elaborate.bat
| | |-- elaborate.log
| | |-- simulate.bat
| | |-- simulate.log
| | |-- TB_VECTORED_func_synth.v
| | |-- TB_VECTORED_func_synth.wdb
| | |-- TB_VECTORED.tcl
| | |-- TB_VECTORED_vlog.prj
| | |-- webtalk.jou
| | |-- webtalk.log
| | |-- xelab.pb
| | |-- xsim.dir
| | | |-- TB_VECTORED_func_synth
| | | | |-- Compile_Options.txt
| | | | |-- obj
| | | | | |-- xsim_0.win64.obj
| | | | | |-- xsim_1.c
| | | | | `-- xsim_1.win64.obj
| | | | |-- TempBreakPointFile.txt
| | | | |-- webtalk
| | | | | |-- usage_statistics_ext_xsim.html
| | | | | `-- usage_statistics_ext_xsim.xml
| | | | |-- xsimcrash.log
| | | | |-- xsim.dbg
| | | | |-- xsimkernel.log
| | | | |-- xsimk.exe
| | | | |-- xsim.mem
| | | | |-- xsim.reloc
| | | | |-- xsim.rlx
| | | | |-- xsim.rtti
| | | | |-- xsim.svtype
| | | | |-- xsim.type
| | | | `-- xsim.xdbg
| | | |-- xil_defaultlib
| | | | |-- glbl.sdb
| | | | |-- @t@b_@v@e@c@t@o@r@[email protected]
| | | | |-- vector_array.sdb
| | | | `-- xil_defaultlib.rlx
| | | `-- xsim.svtype
| | |-- xsim.ini
| | |-- xvlog.log
| | `-- xvlog.pb
| |-- FIFO.srcs
| | |-- sim_1
| | | `-- new
| | | |-- TB_FIFO.v
| | | `-- TB_VECTORED.v
| | `-- sources_1
| | `-- new
| | |-- fifo.v
| | `-- vector_array.v
| |-- fifo.v
| |-- FIFO.xpr
| |-- inter.vpd
| |-- simv
| |-- simv.daidir
| | |-- _18964_archive_1.so
| | |-- _20213_archive_1.so
| | |-- binmap.sdb
| | |-- build_db
| | |-- cgname.json
| | |-- covg_defs
| | |-- debug_dump
| | | |-- dumpcheck.db
| | | |-- dve_debug.db.gz
| | | |-- fsearch
| | | | |-- check_fsearch_db
| | | | `-- idents_cy2i23.xml.gz
| | | |-- HsimSigOptDb.sdb
| | | |-- src_files_verilog
| | | |-- topmodules
| | | `-- vir.sdb
| | |-- elabmoddb.sdb
| | |-- external_functions
| | |-- nsparam.dat
| | |-- pcxpxmr.dat
| | |-- _prev_archive_1.so
| | |-- prof.sdb
| | |-- rmapats.dat
| | |-- saifNetInfo.db
| | |-- simv.kdb
| | |-- tt.sdb
| | |-- vcselab_master_hsim_elabout.db
| | |-- vcselab_misc_hsdef.db
| | |-- vcselab_misc_hsim_elab.db
| | |-- vcselab_misc_hsim_fegate.db
| | |-- vcselab_misc_hsim_lvl.db
| | |-- vcselab_misc_hsim_name.db
| | |-- vcselab_misc_hsim_uds.db
| | |-- vcselab_misc_midd.db
| | |-- vcselab_misc_mnmn.db
| | |-- vcselab_misc_partition.db
| | |-- vcselab_misc_tCEYNb
| | |-- vcselab_misc_vcselabref.db
| | |-- vcselab_misc_vpdnodenums
| | `-- vcs_rebuild
| |-- TB_FIFO.v
| `-- ucli.key
|-- NoC_adding_sv_files_basys3
| |-- NoC_adding_sv_files_basys3.cache
| | `-- wt
| | |-- gui_handlers.wdf
| | |-- java_command_handlers.wdf
| | |-- project.wpc
| | |-- webtalk_pa.xml
| | `-- xsim.wdf
| |-- NoC_adding_sv_files_basys3.hw
| | `-- NoC_adding_sv_files_basys3.lpr
| |-- NoC_adding_sv_files_basys3.ip_user_files
| | `-- README.txt
| |-- NoC_adding_sv_files_basys3.sim
| | `-- sim_1
| | `-- behav
| | `-- xsim
| | |-- compile.log
| | |-- compile.sh
| | |-- elaborate.log
| | |-- elaborate.sh
| | |-- glbl.v
| | |-- tnoc_fabric_vlog.prj
| | |-- xelab.pb
| | |-- xsim.dir
| | | `-- xil_defaultlib
| | | |-- glbl.sdb
| | | |-- tbcm_counter.sdb
| | | |-- tbcm_demux.sdb
| | | |-- tbcm_fifo.sdb
| | | |-- tbcm_mux.sdb
| | | |-- tbcm_round_robin_arbiter.sdb
| | | |-- tnoc_config_pkg.sdb
| | | |-- tnoc_enums_pkg.sdb
| | | |-- tnoc_error_checker.sdb
| | | |-- tnoc_fabric.sdb
| | | |-- tnoc_flit_if_demux.sdb
| | | |-- tnoc_flit_if_dummy_initiator.sdb
| | | |-- tnoc_flit_if_dummy_target.sdb
| | | |-- tnoc_flit_if_fifo.sdb
| | | |-- tnoc_flit_if_mux.sdb
| | | |-- tnoc_flit_if.sdb
| | | |-- tnoc_flit_if_slicer.sdb
| | | |-- tnoc_input_block_dummy.sdb
| | | |-- tnoc_input_block.sdb
| | | |-- tnoc_input_fifo.sdb
| | | |-- tnoc_internal_port_controller.sdb
| | | |-- tnoc_local_port_controller.sdb
| | | |-- tnoc_output_block_dummy.sdb
| | | |-- tnoc_output_block.sdb
| | | |-- tnoc_output_switch.sdb
| | | |-- tnoc_packet_if.sdb
| | | |-- tnoc_packet_packer.sdb
| | | |-- tnoc_packet_unpacker.sdb
| | | |-- tnoc_port_control_if.sdb
| | | |-- tnoc_router_dummy.sdb
| | | |-- tnoc_router.sdb
| | | |-- tnoc_route_selector.sdb
| | | |-- tnoc_vc_demux.sdb
| | | |-- tnoc_vc_merger.sdb
| | | |-- tnoc_vc_mux.sdb
| | | |-- tnoc_vc_selector.sdb
| | | `-- xil_defaultlib.rlx
| | |-- xsim.ini
| | |-- xvlog.log
| | `-- xvlog.pb
| `-- NoC_adding_sv_files_basys3.xpr
|-- NoC_sv_files
| `-- rtl
| |-- tbcm_counter.sv
| |-- tbcm_demux.sv
| |-- tbcm_fifo.sv
| |-- tbcm_mux.sv
| |-- tbcm_round_robin_arbiter.sv
| |-- test.sv
| |-- tnoc_address_decoder_if.sv
| |-- tnoc_axi_adapter_dut_wrapper.sv
| |-- tnoc_axi_adapter_env_configuration.svh
| |-- tnoc_axi_adapter_env_pkg.sv
| |-- tnoc_axi_adapter_env_sequencer.svh
| |-- tnoc_axi_adapter_env.svh
| |-- tnoc_axi_adapter_master_adapter_stress_test.svh
| |-- tnoc_axi_adapter_random_test.svh
| |-- tnoc_axi_adapter_sample_test.svh
| |-- tnoc_axi_adapter_slave_adapter_stress_test.svh
| |-- tnoc_axi_adapter_test_base.svh
| |-- tnoc_axi_adapter_tests_pkg.sv
| |-- tnoc_axi_if.sv
| |-- tnoc_axi_macros.svh
| |-- tnoc_axi_master_adapter.sv
| |-- tnoc_axi_master_read_adapter.sv
| |-- tnoc_axi_master_write_adapter.sv
| |-- tnoc_axi_slave_adapter.sv
| |-- tnoc_axi_slave_read_adapter.sv
| |-- tnoc_axi_slave_write_adapter.sv
| |-- tnoc_axi_types_pkg.sv
| |-- tnoc_axi_write_read_demux.sv
| |-- tnoc_axi_write_read_mux.sv
| |-- tnoc_bfm_component_base.svh
| |-- tnoc_bfm_configuration.svh
| |-- tnoc_bfm_flit_if.sv
| |-- tnoc_bfm_flit_item.svh
| |-- tnoc_bfm_macro.svh
| |-- tnoc_bfm_packet_agent.svh
| |-- tnoc_bfm_packet_item.svh
| |-- tnoc_bfm_packet_sequencer.svh
| |-- tnoc_bfm_packet_vc_agent.svh
| |-- tnoc_bfm_packet_vc_driver.svh
| |-- tnoc_bfm_packet_vc_monitor.svh
| |-- tnoc_bfm_packet_vc_sequencer.svh
| |-- tnoc_bfm_pkg.sv
| |-- tnoc_bfm_sequence_base.svh
| |-- tnoc_bfm_status.svh
| |-- tnoc_bfm_transmit_packet_sequence.svh
| |-- tnoc_bfm_types_pkg.sv
| |-- tnoc_common_env_pkg.sv
| |-- tnoc_common_utilities.svh
| |-- tnoc_config_defines.svh
| |-- tnoc_config_pkg.sv
| |-- tnoc_default_imports.svh
| |-- tnoc_enums_pkg.sv
| |-- tnoc_error_checker.sv
| |-- tnoc_fabric_env_configuration.svh
| |-- tnoc_fabric_env_model.svh
| |-- tnoc_fabric_env_pkg.sv
| |-- tnoc_fabric_env_sequencer.svh
| |-- tnoc_fabric_env.svh
| |-- tnoc_fabric_invalid_destination_test.svh
| |-- tnoc_fabric_random_test.svh
| |-- tnoc_fabric_sample_test.svh
| |-- tnoc_fabric_stress_access_test.svh
| |-- tnoc_fabric.sv
| |-- tnoc_fabric_test_base.svh
| |-- tnoc_fabric_tests_pkg.sv
| |-- tnoc_flit_array_if_connector.sv
| |-- tnoc_flit_if_arbiter.sv
| |-- tnoc_flit_if_connector.sv
| |-- tnoc_flit_if_demux.sv
| |-- tnoc_flit_if_dummy_initiator.sv
| |-- tnoc_flit_if_dummy_target.sv
| |-- tnoc_flit_if_fifo.sv
| |-- tnoc_flit_if_mux.sv
| |-- tnoc_flit_if_slicer.sv
| |-- tnoc_flit_if.sv
| |-- tnoc_input_block_dummy.sv
| |-- tnoc_input_block.sv
| |-- tnoc_input_fifo.sv
| |-- tnoc_internal_port_controller.sv
| |-- tnoc_local_port_controller.sv
| |-- tnoc_macros.svh
| |-- tnoc_model_base.svh
| |-- tnoc_output_block_dummy.sv
| |-- tnoc_output_block.sv
| |-- tnoc_output_switch.sv
| |-- tnoc_packet_flit_macros.svh
| |-- tnoc_packet_if.sv
| |-- tnoc_packet_packer.sv
| |-- tnoc_packet_scoreboard.svh
| |-- tnoc_packet_unpacker.sv
| |-- tnoc_port_control_if.sv
| |-- tnoc_router_different_route_test.svh
| |-- tnoc_router_dummy.sv
| |-- tnoc_router_env_configuration.svh
| |-- tnoc_router_env_model.sv
| |-- tnoc_router_env_pkg.sv
| |-- tnoc_router_env_sequencer.svh
| |-- tnoc_router_env.svh
| |-- tnoc_router_internal_if_adapter.sv
| |-- tnoc_router_invalid_destination_test.svh
| |-- tnoc_router_output_arbitration_test.svh
| |-- tnoc_router_random_test.svh
| |-- tnoc_router_sample_test.svh
| |-- tnoc_router_stress_access_test.svh
| |-- tnoc_router.sv
| |-- tnoc_router_test_base.svh
| |-- tnoc_router_tests_pkg.sv
| |-- tnoc_router_virtual_channel_test.svh
| |-- tnoc_route_selector.sv
| |-- tnoc_sequence_base.svh
| |-- tnoc_test_base.svh
| |-- tnoc_vc_demux.sv
| |-- tnoc_vc_merger.sv
| |-- tnoc_vc_mux.sv
| |-- tnoc_vc_selector.sv
| |-- top.sv
| |-- tue_agent.svh
| |-- tue_check_type.svh
| |-- tue_component_base.svh
| |-- tue_component_proxy.svh
| |-- tue_component.svh
| |-- tue_configuration.svh
| |-- tue_driver.svh
| |-- tue_env.svh
| |-- tue_fifo.svh
| |-- tue_globals.svh
| |-- tue_macros.svh
| |-- tue_monitor.svh
| |-- tue_object_base.svh
| |-- tue_object_defines.svh
| |-- tue_param_agent.svh
| |-- tue_param_monitor.svh
| |-- tue_pkg.sv
| |-- tue_reactive_agent.svh
| |-- tue_reactive_monitor.svh
| |-- tue_reactive_sequencer.svh
| |-- tue_reactive_sequence.svh
| |-- tue_reg_item.svh
| |-- tue_reg_predictor.svh
| |-- tue_scoreboard.svh
| |-- tue_sequence_base.svh
| |-- tue_sequence_item_base.svh
| |-- tue_sequence_item.svh
| |-- tue_sequencer.svh
| |-- tue_sequence.svh
| |-- tue_status.svh
| |-- tue_subscriber.svh
| |-- tue_test.svh
| |-- tue_version_defines.svh
| |-- tue_version.svh
| |-- tvip_axi_agent_base.svh
| |-- tvip_axi_component_base.svh
| |-- tvip_axi_configuration.svh
| |-- tvip_axi_defines.svh
| |-- tvip_axi_if.sv
| |-- tvip_axi_internal_macros.svh
| |-- tvip_axi_item.svh
| |-- tvip_axi_master_access_sequence.svh
| |-- tvip_axi_master_agent.svh
| |-- tvip_axi_master_driver.svh
| |-- tvip_axi_master_monitor.svh
| |-- tvip_axi_master_ral_adapter.svh
| |-- tvip_axi_master_ral_predictor.svh
| |-- tvip_axi_master_read_sequence.svh
| |-- tvip_axi_master_sequence_base.svh
| |-- tvip_axi_master_sequencer.svh
| |-- tvip_axi_master_write_sequence.svh
| |-- tvip_axi_memory.svh
| |-- tvip_axi_monitor_base.svh
| |-- tvip_axi_payload_store.svh
| |-- tvip_axi_pkg.sv
| |-- tvip_axi_sample_configuration.svh
| |-- tvip_axi_sample_pkg.sv
| |-- tvip_axi_sample_test.svh
| |-- tvip_axi_sample_write_read_sequence.svh
| |-- tvip_axi_sequence_base.svh
| |-- tvip_axi_sequencer_base.svh
| |-- tvip_axi_slave_agent.svh
| |-- tvip_axi_slave_data_monitor.svh
| |-- tvip_axi_slave_default_sequence.svh
| |-- tvip_axi_slave_driver.svh
| |-- tvip_axi_slave_monitor.svh
| |-- tvip_axi_slave_sequence_base.svh
| |-- tvip_axi_slave_sequencer.svh
| |-- tvip_axi_status.svh
| |-- tvip_axi_types_pkg.sv
| `-- tvip_axi_undef_internal_macros.svh
|-- tnoc
| |-- env
| | |-- axi_adapter
| | | |-- compile.f
| | | |-- tnoc_axi_adapter_dut_wrapper.sv
| | | |-- tnoc_axi_adapter_env_configuration.svh
| | | |-- tnoc_axi_adapter_env_pkg.sv
| | | |-- tnoc_axi_adapter_env_sequencer.svh
| | | |-- tnoc_axi_adapter_env.svh
| | | `-- top.sv
| | |-- axi_vip
| | | |-- compile.f
| | | |-- LICENSE
| | | |-- README.md
| | | |-- sample
| | | | |-- env
| | | | | |-- compile.f
| | | | | |-- top.sv
| | | | | |-- tvip_axi_sample_configuration.svh
| | | | | |-- tvip_axi_sample_pkg.sv
| | | | | |-- tvip_axi_sample_test.svh
| | | | | `-- tvip_axi_sample_write_read_sequence.svh
| | | | `-- work
| | | | |-- default
| | | | | `-- test.f
| | | | |-- makefile
| | | | |-- out_of_order_response
| | | | | `-- test.f
| | | | |-- read_interleave
| | | | | `-- test.f
| | | | |-- ready_delay
| | | | | `-- test.f
| | | | |-- response_delay
| | | | | `-- test.f
| | | | |-- response_start_delay
| | | | | `-- test.f
| | | | |-- vcs.mk
| | | | |-- write_data_delay
| | | | | `-- test.f
| | | | `-- xcelium.mk
| | | |-- setup_submodules.sh
| | | |-- src
| | | | |-- tvip_axi_agent_base.svh
| | | | |-- tvip_axi_component_base.svh
| | | | |-- tvip_axi_configuration.svh
| | | | |-- tvip_axi_defines.svh
| | | | |-- tvip_axi_if.sv
| | | | |-- tvip_axi_internal_macros.svh
| | | | |-- tvip_axi_item.svh
| | | | |-- tvip_axi_master_access_sequence.svh
| | | | |-- tvip_axi_master_agent.svh
| | | | |-- tvip_axi_master_driver.svh
| | | | |-- tvip_axi_master_monitor.svh
| | | | |-- tvip_axi_master_ral_adapter.svh
| | | | |-- tvip_axi_master_ral_predictor.svh
| | | | |-- tvip_axi_master_read_sequence.svh
| | | | |-- tvip_axi_master_sequence_base.svh
| | | | |-- tvip_axi_master_sequencer.svh
| | | | |-- tvip_axi_master_write_sequence.svh
| | | | |-- tvip_axi_memory.svh
| | | | |-- tvip_axi_monitor_base.svh
| | | | |-- tvip_axi_payload_store.svh
| | | | |-- tvip_axi_pkg.sv
| | | | |-- tvip_axi_sequence_base.svh
| | | | |-- tvip_axi_sequencer_base.svh
| | | | |-- tvip_axi_slave_agent.svh
| | | | |-- tvip_axi_slave_data_monitor.svh
| | | | |-- tvip_axi_slave_default_sequence.svh
| | | | |-- tvip_axi_slave_driver.svh
| | | | |-- tvip_axi_slave_monitor.svh
| | | | |-- tvip_axi_slave_sequence_base.svh
| | | | |-- tvip_axi_slave_sequencer.svh
| | | | |-- tvip_axi_status.svh
| | | | |-- tvip_axi_types_pkg.sv
| | | | `-- tvip_axi_undef_internal_macros.svh
| | | `-- tue
| | |-- bfm
| | | |-- compile.f
| | | |-- tnoc_bfm_component_base.svh
| | | |-- tnoc_bfm_configuration.svh
| | | |-- tnoc_bfm_flit_if.sv
| | | |-- tnoc_bfm_flit_item.svh
| | | |-- tnoc_bfm_macro.svh
| | | |-- tnoc_bfm_packet_agent.svh
| | | |-- tnoc_bfm_packet_item.svh
| | | |-- tnoc_bfm_packet_sequencer.svh
| | | |-- tnoc_bfm_packet_vc_agent.svh
| | | |-- tnoc_bfm_packet_vc_driver.svh
| | | |-- tnoc_bfm_packet_vc_monitor.svh
| | | |-- tnoc_bfm_packet_vc_sequencer.svh
| | | |-- tnoc_bfm_pkg.sv
| | | |-- tnoc_bfm_sequence_base.svh
| | | |-- tnoc_bfm_status.svh
| | | |-- tnoc_bfm_transmit_packet_sequence.svh
| | | `-- tnoc_bfm_types_pkg.sv
| | |-- common
| | | |-- compile.f
| | | |-- tnoc_common_env_pkg.sv
| | | |-- tnoc_common_utilities.svh
| | | |-- tnoc_flit_array_if_connector.sv
| | | |-- tnoc_flit_if_connector.sv
| | | |-- tnoc_model_base.svh
| | | |-- tnoc_packet_scoreboard.svh
| | | |-- tnoc_sequence_base.svh
| | | `-- tnoc_test_base.svh
| | |-- fabric
| | | |-- compile.f
| | | |-- tnoc_fabric_env_configuration.svh
| | | |-- tnoc_fabric_env_model.svh
| | | |-- tnoc_fabric_env_pkg.sv
| | | |-- tnoc_fabric_env_sequencer.svh
| | | |-- tnoc_fabric_env.svh
| | | `-- top.sv
| | |-- router
| | | |-- compile.f
| | | |-- tnoc_router_env_configuration.svh
| | | |-- tnoc_router_env_model.sv
| | | |-- tnoc_router_env_pkg.sv
| | | |-- tnoc_router_env_sequencer.svh
| | | |-- tnoc_router_env.svh
| | | |-- tnoc_router_internal_if_adapter.sv
| | | `-- top.sv
| | `-- tue
| | |-- compile.f
| | |-- examples
| | | |-- base
| | | | `-- tue_component_base
| | | | |-- makefile
| | | | `-- test.sv
| | | |-- common.mk
| | | |-- comps
| | | | |-- tue_param_agent
| | | | | |-- makefile
| | | | | `-- test.sv
| | | | `-- tue_reactive_agent
| | | | |-- makefile
| | | | `-- test.sv
| | | `-- seq
| | | `-- tue_sequence_item
| | | |-- makefile
| | | `-- test.sv
| | |-- LICENSE
| | |-- README.md
| | `-- src
| | |-- base
| | | |-- tue_check_type.svh
| | | |-- tue_component_base.svh
| | | |-- tue_component_proxy.svh
| | | |-- tue_component.svh
| | | |-- tue_configuration.svh
| | | |-- tue_fifo.svh
| | | |-- tue_globals.svh
| | | |-- tue_object_base.svh
| | | |-- tue_status.svh
| | | `-- tue_version.svh
| | |-- comps
| | | |-- tue_agent.svh
| | | |-- tue_driver.svh
| | | |-- tue_env.svh
| | | |-- tue_monitor.svh
| | | |-- tue_param_agent.svh
| | | |-- tue_param_monitor.svh
| | | |-- tue_reactive_agent.svh
| | | |-- tue_reactive_monitor.svh
| | | |-- tue_scoreboard.svh
| | | |-- tue_subscriber.svh
| | | `-- tue_test.svh
| | |-- macros
| | | |-- tue_object_defines.svh
| | | `-- tue_version_defines.svh
| | |-- reg
| | | |-- tue_reg_item.svh
| | | `-- tue_reg_predictor.svh
| | |-- seq
| | | |-- tue_reactive_sequencer.svh
| | | |-- tue_reactive_sequence.svh
| | | |-- tue_sequence_base.svh
| | | |-- tue_sequence_item_base.svh
| | | |-- tue_sequence_item.svh
| | | |-- tue_sequencer.svh
| | | `-- tue_sequence.svh
| | |-- tue_macros.svh
| | `-- tue_pkg.sv
| |-- env.sh
| |-- LICENSE
| |-- NOTICE
| |-- README.md
| |-- rtl
| | |-- axi_adapter
| | | |-- compile.f
| | | |-- tnoc_axi_if.sv
| | | |-- tnoc_axi_macros.svh
| | | |-- tnoc_axi_master_adapter.sv
| | | |-- tnoc_axi_master_read_adapter.sv
| | | |-- tnoc_axi_master_write_adapter.sv
| | | |-- tnoc_axi_slave_adapter.sv
| | | |-- tnoc_axi_slave_read_adapter.sv
| | | |-- tnoc_axi_slave_write_adapter.sv
| | | |-- tnoc_axi_types_pkg.sv
| | | |-- tnoc_axi_write_read_demux.sv
| | | `-- tnoc_axi_write_read_mux.sv
| | |-- bcm
| | | |-- compile.f
| | | |-- LICENSE
| | | |-- README.md
| | | |-- tbcm_counter.sv
| | | |-- tbcm_demux.sv
| | | |-- tbcm_fifo.sv
| | | |-- tbcm_mux.sv
| | | `-- tbcm_round_robin_arbiter.sv
| | |-- common
| | | |-- compile.f
| | | |-- tnoc_address_decoder_if.sv
| | | |-- tnoc_default_imports.svh
| | | |-- tnoc_enums_pkg.sv
| | | |-- tnoc_flit_if_arbiter.sv
| | | |-- tnoc_flit_if_demux.sv
| | | |-- tnoc_flit_if_dummy_initiator.sv
| | | |-- tnoc_flit_if_dummy_target.sv
| | | |-- tnoc_flit_if_fifo.sv
| | | |-- tnoc_flit_if_mux.sv
| | | |-- tnoc_flit_if_slicer.sv
| | | |-- tnoc_flit_if.sv
| | | |-- tnoc_macros.svh
| | | |-- tnoc_packet_flit_macros.svh
| | | |-- tnoc_packet_if.sv
| | | |-- tnoc_packet_packer.sv
| | | |-- tnoc_packet_unpacker.sv
| | | |-- tnoc_vc_demux.sv
| | | |-- tnoc_vc_mux.sv
| | | `-- tnoc_vc_selector.sv
| | |-- compile.f
| | |-- config
| | | |-- compile.f
| | | |-- tnoc_config_defines.svh
| | | `-- tnoc_config_pkg.sv
| | |-- fabric
| | | |-- compile.f
| | | |-- tnoc_fabric.sv
| | | `-- tnoc_router_dummy.sv
| | |-- router
| | | |-- compile.f
| | | |-- tnoc_error_checker.sv
| | | |-- tnoc_input_block_dummy.sv
| | | |-- tnoc_input_block.sv
| | | |-- tnoc_input_fifo.sv
| | | |-- tnoc_internal_port_controller.sv
| | | |-- tnoc_local_port_controller.sv
| | | |-- tnoc_output_block_dummy.sv
| | | |-- tnoc_output_block.sv
| | | |-- tnoc_output_switch.sv
| | | |-- tnoc_port_control_if.sv
| | | |-- tnoc_router.sv
| | | |-- tnoc_route_selector.sv
| | | `-- tnoc_vc_merger.sv
| | |-- vivado_11554.backup.jou
| | |-- vivado_11554.backup.log
| | |-- vivado_26584.backup.jou
| | |-- vivado_26584.backup.log
| | |-- vivado_3766.backup.jou
| | |-- vivado_3766.backup.log
| | |-- vivado_6376.backup.jou
| | |-- vivado_6376.backup.log
| | |-- vivado.jou
| | `-- vivado.log
| |-- setup_submodules.sh
| |-- sim
| | |-- axi_adapter_data_width_256
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/axi_adapter/test_list.mk
| | |-- axi_adapter_data_width_64
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/axi_adapter/test_list.mk
| | |-- common
| | | |-- common.mk
| | | |-- vcs.mk
| | | `-- xcelium.mk
| | |-- fabric_data_width_256_vc_1
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | |-- simv.daidir
| | | | `-- prof.sdb
| | | |-- test_list.mk -> ../../test/fabric/test_list.mk
| | | `-- vcs.log
| | |-- fabric_data_width_256_vc_2
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/fabric/test_list.mk
| | |-- fabric_data_width_32_vc_1
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/fabric/test_list.mk
| | |-- fabric_data_width_32_vc_2
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/fabric/test_list.mk
| | |-- fabric_data_width_64_vc_1
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/fabric/test_list.mk
| | |-- fabric_data_width_64_vc_2
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/fabric/test_list.mk
| | |-- makefile
| | |-- router_data_width_256_vc_1
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/router/test_list.mk
| | |-- router_data_width_256_vc_2
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/router/test_list.mk
| | |-- router_data_width_32_vc_1
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/router/test_list.mk
| | |-- router_data_width_32_vc_2
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/router/test_list.mk
| | |-- router_data_width_64_vc_1
| | | |-- local.mk
| | | |-- makefile -> ../common/common.mk
| | | `-- test_list.mk -> ../../test/router/test_list.mk
| | `-- router_data_width_64_vc_2
| | |-- local.mk
| | |-- makefile -> ../common/common.mk
| | `-- test_list.mk -> ../../test/router/test_list.mk
| `-- test
| |-- axi_adapter
| | |-- compile.f
| | |-- test_list.mk
| | |-- tnoc_axi_adapter_master_adapter_stress_test.svh
| | |-- tnoc_axi_adapter_random_test.svh
| | |-- tnoc_axi_adapter_sample_test.svh
| | |-- tnoc_axi_adapter_slave_adapter_stress_test.svh
| | |-- tnoc_axi_adapter_test_base.svh
| | `-- tnoc_axi_adapter_tests_pkg.sv
| |-- fabric
| | |-- compile.f
| | |-- test_list.mk
| | |-- tnoc_fabric_invalid_destination_test.svh
| | |-- tnoc_fabric_random_test.svh
| | |-- tnoc_fabric_sample_test.svh
| | |-- tnoc_fabric_stress_access_test.svh
| | |-- tnoc_fabric_test_base.svh
| | `-- tnoc_fabric_tests_pkg.sv
| `-- router
| |-- compile.f
| |-- test_list.mk
| |-- tnoc_router_different_route_test.svh
| |-- tnoc_router_invalid_destination_test.svh
| |-- tnoc_router_output_arbitration_test.svh
| |-- tnoc_router_random_test.svh
| |-- tnoc_router_sample_test.svh
| |-- tnoc_router_stress_access_test.svh
| |-- tnoc_router_test_base.svh
| |-- tnoc_router_tests_pkg.sv
| `-- tnoc_router_virtual_channel_test.svh
`-- tnoc.txt
129 directories, 807 files
make run_simv TEST_NAME=tnoc_router_sample_test
make[1]: Entering directory `/home/jeet/Async_Priority/tnoc/sim/router_data_width_64_vc_2'
if [ ! -f simv ] ; then \
make compile_simv ; \
fi
make[2]: Entering directory `/home/jeet/Async_Priority/tnoc/sim/router_data_width_64_vc_2'
vcs -full64 -sverilog -timescale="1ns/1ps" -l vcs.log -ntb_opts uvm-1.2 +define+UVM_NO_DEPRECATED +define+UVM_OBJECT_MUST_HAVE_CONSTRUCTO -top top -f /home/jeet/Async_Priority/tnoc/rtl/config/compile.f -f /home/jeet/Async_Priority/tnoc/rtl/bcm/compile.f -f /home/jeet/Async_Priority/tnoc/rtl/common/compile.f -f /home/jeet/Async_Priority/tnoc/rtl/router/compile.f -f /home/jeet/Async_Priority/tnoc/env/tue/compile.f -f /home/jeet/Async_Priority/tnoc/env/bfm/compile.f -f /home/jeet/Async_Priority/tnoc/env/common/compile.f -f /home/jeet/Async_Priority/tnoc/env/router/compile.f -f /home/jeet/Async_Priority/tnoc/test/router/compile.f /home/jeet/Async_Priority/tnoc/env/router/top.sv +define+TNOC_ROUTER_ENV_DATA_WIDTH=64 +define+TNOC_ROUTER_ENV_VIRTUAL_CHANNELS=2
Warning-[LNX_OS_VERUN] Unsupported Linux version
Linux version 'CentOS Linux release 7.6.1810 (Core) ' is not supported on
'x86_64' officially, assuming linux compatibility by default. Set
VCS_ARCH_OVERRIDE to linux or suse32 to override.
Please refer to release notes for information on supported platforms.
Warning-[LINX_KRNL] Unsupported Linux kernel
Linux kernel '3.10.0-957.27.2.el7.x86_64' is not supported.
Supported versions are 2.4* or 2.6*.
Chronologic VCS (TM)
Version J-2014.12-SP3-8_Full64 -- Sat Sep 14 22:11:04 2019
Copyright (c) 1991-2014 by Synopsys Inc.
ALL RIGHTS RESERVED
This program is proprietary and confidential information of Synopsys Inc.
and may be used and disclosed only as authorized in a license agreement
controlling such use and disclosure.
Parsing design file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_version_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_global_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_message_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_phase_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_object_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_printer_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_tlm_defines.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm_imps.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_tlm_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_sequence_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_callback_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_reg_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/macros/uvm_deprecated_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_dpi.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_hdl.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_dpi.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_svcmd_dpi.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_dpi.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_regex.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/dpi/uvm_dpi.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_coreservice.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_version.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_object_globals.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_misc.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_object.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_pool.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_queue.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_factory.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_registry.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_spell_chkr.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_resource.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_resource_specializations.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_resource_db.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_config_db.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_printer.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_comparer.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_packer.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_links.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_tr_database.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_tr_stream.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_recorder.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_event_callback.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_event.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_barrier.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_callback.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_macros.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_callback.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_report_message.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_report_catcher.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_report_server.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_report_handler.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_report_object.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_transaction.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_phase.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_domain.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_bottomup_phase.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_topdown_phase.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_task_phase.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_common_phases.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_runtime_phases.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_component.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_root.svh'.
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Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_objection.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_heartbeat.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_globals.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_base.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_cmdline_processor.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_traversal.svh'.
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Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_dap.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_set_get_dap_base.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_dap.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_simple_lock_dap.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_get_to_lock_dap.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_dap.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_set_before_get_dap.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/dap/uvm_dap.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm_ifs.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_sqr_ifs.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/base/uvm_port_base.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm_imps.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_imps.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_ports.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_exports.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_analysis_port.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm_fifo_base.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm_fifos.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm_req_rsp.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_sqr_connections.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm1/uvm_tlm.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_pair.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_policies.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_in_order_comparator.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_algorithmic_comparator.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_random_stimulus.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_subscriber.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_monitor.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_driver.svh'.
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Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_push_driver.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_scoreboard.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_agent.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_env.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_test.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/comps/uvm_comps.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequence_item.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequencer_base.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequencer_analysis_fifo.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequencer_param_base.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequencer.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_push_sequencer.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequence_base.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequence.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequence_library.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_sequence_builtin.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/seq/uvm_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_defines.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_time.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_generic_payload.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_ifs.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_imps.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_ports.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_exports.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_sockets_base.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2_sockets.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/tlm2/uvm_tlm2.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_item.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_adapter.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_predictor.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_sequence.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_cbs.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_backdoor.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_field.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_vreg_field.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_indirect.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_fifo.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_file.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_mem_mam.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_vreg.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_mem.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_map.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_block.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_reg_hw_reset_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_reg_bit_bash_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_mem_walk_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_mem_access_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_reg_access_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_reg_mem_shared_access_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_reg_mem_built_in_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/sequences/uvm_reg_mem_hdl_paths_seq.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Parsing included file '/opt/tools/Synopsys//etc/uvm-1.2/reg/snps_uvm_reg_bank.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/reg/uvm_reg_model.svh'.
Back to file '/opt/tools/Synopsys//etc/uvm-1.2/uvm_pkg.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/config/tnoc_config_pkg.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/config/tnoc_config_defines.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/config/tnoc_config_pkg.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/bcm/tbcm_counter.sv'
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/bcm/tbcm_fifo.sv'
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/bcm/tbcm_mux.sv'
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/bcm/tbcm_demux.sv'
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/bcm/tbcm_round_robin_arbiter.sv'
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_enums_pkg.sv'
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_default_imports.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_packet_flit_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_mux.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_default_imports.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_mux.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_packet_flit_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_mux.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_demux.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_default_imports.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_demux.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_packet_flit_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_demux.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_fifo.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_default_imports.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_fifo.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_fifo.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_packet_flit_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_fifo.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_slicer.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_default_imports.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_slicer.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_arbiter.sv'
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_default_imports.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_arbiter.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_arbiter.sv'.
Parsing included file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_packet_flit_macros.svh'.
Back to file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_arbiter.sv'.
Parsing design file '/home/jeet/Async_Priority/tnoc/rtl/common/tnoc_flit_if_dummy_initiator.sv'
Parsing included file '/home/jeet
from tnoc.
taichi-ishitani
commented on August 16, 2024
First, the submodule clone is not working because of some public license issue
Could you please tell me more details? I'd like to see the log.
But I am receiving errors which I am unable to rectify. The dump of the error is
Could you send me the log file? The vcs.log is the log of compilation.
In addition, VCS Version J-2014.12 is too old can you use the latest VCS?
from tnoc.
JEETIITGN
commented on August 16, 2024
Dear Taichi-Ishitani
PFA the dump file for recursively updating the submodule. Also, the dump
file after executing the ./setup_submodules.sh.
Jitesh Sah (18210103)
M.Tech. Microelectronics and VLSI Design,
Electrical Engineering
IIT Gandhinagar
On Sun, Sep 15, 2019 at 6:38 AM Taichi Ishitani ***@***.***> wrote:
First, the submodule clone is not working because of some public license
issue
Could you please tell me more details? I'd like to see the log.
But I am receiving errors which I am unable to rectify. The dump of the
error is
Could you send me the log file? The vcs.log is the log of compilation.
In addition, VCS Version J-2014.12 is too old can you use the latest VCS?
—
You are receiving this because you were mentioned.
Reply to this email directly, view it on GitHub
<#49?email_source=notifications&email_token=ALS4XZ3XSKEWWJSZAXYOT53QJWDJRA5CNFSM4IWWH3QKYY3PNVWWK3TUL52HS4DFVREXG43VMVBW63LNMVXHJKTDN5WW2ZLOORPWSZGOD6XHAZA#issuecomment-531525732>,
or mute the thread
<https://github.com/notifications/unsubscribe-auth/ALS4XZ54EQ3BXJMMUNYM56TQJWDJRANCNFSM4IWWH3QA>
.
$./setup_submodules.sh >>dump_setup_submodules.txt
Permission denied (publickey).
fatal: Could not read from remote repository.
Please make sure you have the correct access rights
and the repository exists.
Clone of '[email protected]:taichi-ishitani/tbcm.git' into submodule path 'rtl/bcm' failed
Permission denied (publickey).
fatal: Could not read from remote repository.
Please make sure you have the correct access rights
and the repository exists.
Clone of '[email protected]:taichi-ishitani/tue.git' into submodule path 'env/tue' failed
Permission denied (publickey).
fatal: Could not read from remote repository.
Please make sure you have the correct access rights
and the repository exists.
Clone of '[email protected]:taichi-ishitani/tvip-axi.git' into submodule path 'env/axi_vip' failed
$ git submodule update --recursive
Cloning into 'rtl/bcm'...
Permission denied (publickey).
fatal: Could not read from remote repository.
Please make sure you have the correct access rights
and the repository exists.
Clone of '[email protected]:taichi-ishitani/tbcm.git' into submodule path 'rtl/bcm' failed
from tnoc.
taichi-ishitani
commented on August 16, 2024
Hi @JEETIITGN ,
Could you please use following commands instead of executing setup_submodules.sh script?
$ git clone https://github.com/taichi-ishitani/tbcm.git
$ git clone https://github.com/taichi-ishitani/tue.git
$ git clone https://github.com/taichi-ishitani/tvip-axi.git
$ export TBCM_HOME=`pwd`/tbcm
$ export TUE_HOME=`pwd`/tue
$ export TVIP_AXI_HOME=`pwd`/tvip-axi
from tnoc.
JEETIITGN
commented on August 16, 2024
Dear Taichi-Ishitani
PFA the dump after the steps you mentioned. The dump file is generated
after running make in the directory you mentioned earlier
i.e. tnoc/sim/router_data_width_64_vc_2. The steps I followed are (when I
am inside the tnoc directory):
1) $ git clone https://github.com/taichi-ishitani/tbcm.git
$ git clone https://github.com/taichi-ishitani/tue.git
$ git clone https://github.com/taichi-ishitani/tvip-axi.git
$ export TBCM_HOME=`pwd`/tbcm
$ export TUE_HOME=`pwd`/tue
$ export TVIP_AXI_HOME=`pwd`/tvip-axi
2) cd tnoc/sim/router_data_width_64_vc_2
3) make
Jitesh Sah (18210103)
M.Tech. Microelectronics and VLSI Design,
Electrical Engineering
IIT Gandhinagar
On Sun, Sep 15, 2019 at 4:39 PM Taichi Ishitani ***@***.***> wrote:
Hi @JEETIITGN <https://github.com/JEETIITGN> ,
Could you please use following command instead of executing
setup_submodules.sh script?
$ git clone https://github.com/taichi-ishitani/tbcm.git
$ git clone https://github.com/taichi-ishitani/tue.git
$ git clone https://github.com/taichi-ishitani/tvip-axi.git
$ export TBCM_HOME=`pwd`/tbcm
$ export TUE_HOME=`pwd`/tue
$ export TVIP_AXI_HOME=`pwd`/tvip-axi
—
You are receiving this because you were mentioned.
Reply to this email directly, view it on GitHub
<#49?email_source=notifications&email_token=ALS4XZ4UYTFZ7GR5J5THKSTQJYJVPA5CNFSM4IWWH3QKYY3PNVWWK3TUL52HS4DFVREXG43VMVBW63LNMVXHJKTDN5WW2ZLOORPWSZGOD6XOPSQ#issuecomment-531556298>,
or mute the thread
<https://github.com/notifications/unsubscribe-auth/ALS4XZ6FVNI5T7SM5ERLJGLQJYJVPANCNFSM4IWWH3QA>
.
Top Level Modules:
top
Warning-[UII-L] Interface not instantiated
/home/jeet/Async_Priority/compile_loc/tnoc/rtl/common/tnoc_address_decoder_if.sv, 3
Interface 'tnoc_address_decoer_if' defined in logic library 'work' is never
instantiated in design. It will be ignored.
TimeScale is 1 ns / 1 ps
Error-[NYI-CSTR-SYS-FTC] NYI constraint: sys function calls
/home/jeet/Async_Priority/compile_loc/tnoc/env/bfm/tnoc_bfm_configuration.svh, 80
tnoc_bfm_pkg, "$clog2(this.virtual_channels)"
System function calls are not yet implemented in constraints.
Remove the function call or if possible replace it with an integral state
variable assigned in pre_randomize().
Error-[NYI-CSTR-SYS-FTC] NYI constraint: sys function calls
/home/jeet/Async_Priority/compile_loc/tnoc/env/bfm/tnoc_bfm_configuration.svh, 94
tnoc_bfm_pkg, "$clog2(this.tags)"
System function calls are not yet implemented in constraints.
Remove the function call or if possible replace it with an integral state
variable assigned in pre_randomize().
Error-[NYI-CSTR-SYS-FTC] NYI constraint: sys function calls
/home/jeet/Async_Priority/compile_loc/tnoc/env/bfm/tnoc_bfm_configuration.svh, 108
tnoc_bfm_pkg, "$clog2(this.max_burst_length)"
System function calls are not yet implemented in constraints.
Remove the function call or if possible replace it with an integral state
variable assigned in pre_randomize().
1 warning
3 errors
CPU time: 3.727 seconds to compile
make[2]: *** [compile_simv] Error 255
make[2]: Leaving directory `/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'
make[1]: *** [run_simv] Error 2
make[1]: Leaving directory `/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'
make: *** [tnoc_router_sample_test] Error 2
from tnoc.
taichi-ishitani
commented on August 16, 2024
Hi @JEETIITGN ,
I attached patch files to execute the sample tests on VCS J-2014.12 version.
patch.zip
Unzip the attached zip then you will get two patch files.
- tnoc_bfm_configuration.svh.patch
- Apply to
env/bfm/tnoc_bfm_configuration.svh
- Apply to
- tnoc_bfm_transmit_packet_sequence.svh.patch
- Apply to
env/bfm/tnoc_bfm_transmit_packet_sequence.svh.
- Apply to
Could you please apply the patch files and try to run simulation again?
from tnoc.
JEETIITGN
commented on August 16, 2024
Dear Taichi-Ishitani,
I have successfully patched your files, using make I am able to build the
router. But the command:
$ make clean; make DUMP=fsdb
I am receiving error as:
$ make DUMP=fsdb
make run_simv TEST_NAME=tnoc_router_sample_test
make[1]: Entering directory
`/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'
if [ ! -f simv ] ; then \
make compile_simv ; \
fi
make[2]: Entering directory
`/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'
vcs -full64 -debug_all -sverilog -timescale="1ns/1ps" -l vcs.log -ntb_opts
uvm-1.2 +define+UVM_NO_DEPRECATED +define+UVM_OBJECT_MUST_HAVE_CONSTRUCTO
-debug_access -kdb +vcs+fsdbon -top top -f
/home/jeet/Async_Priority/compile_loc/tnoc/rtl/config/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/tbcm/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/rtl/common/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/rtl/router/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/tue/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/env/bfm/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/env/common/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/env/router/compile.f -f
/home/jeet/Async_Priority/compile_loc/tnoc/test/router/compile.f
/home/jeet/Async_Priority/compile_loc/tnoc/env/router/top.sv
+define+TNOC_ROUTER_ENV_DATA_WIDTH=64
+define+TNOC_ROUTER_ENV_VIRTUAL_CHANNELS=2
Error-[UNDEF_ENVR] Undefined env variables
Environment variables NOVAS_HOME or DEBUSSY_HOME is not set.
Please set one of these variables and continue.
make[2]: *** [compile_simv] Error 1
make[2]: Leaving directory
`/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'
make[1]: *** [run_simv] Error 2
make[1]: Leaving directory
`/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'
make: *** [tnoc_router_sample_test] Error 2
Jitesh Sah (18210103)
M.Tech. Microelectronics and VLSI Design,
Electrical Engineering
IIT Gandhinagar
…On Sun, Sep 15, 2019 at 7:58 PM Taichi Ishitani ***@***.***> wrote:
Hi @JEETIITGN <https://github.com/JEETIITGN> ,
I attached patch files to execute the sample tests on VCS J-2014.12
version.
patch.zip
<https://github.com/taichi-ishitani/tnoc/files/3613843/patch.zip>
Unzip the attached zip then you will get two patch files.
- tnoc_bfm_configuration.svh.patch
- Apply to env/bfm/tnoc_bfm_configuration.svh
- tnoc_bfm_transmit_packet_sequence.svh.patch
- Apply to env/bfm/tnoc_bfm_transmit_packet_sequence.svh.
Could you please apply the patch files and try to run simulation again?
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taichi-ishitani
commented on August 16, 2024
Hi @JEETIITGN ,
Options to enable FSDB dump were changed and Makefiles do not support the old options.
Could you please use VDP dump instead of FSDB dump or update VCS version?
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taichi-ishitani
commented on August 16, 2024
My previous answer is wrong.
Can you use Verdi tool for debugging? If no, you have to use VPD format.
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JEETIITGN
commented on August 16, 2024
Hi Taichi-Ishitani,
I have access to Verdi tool, but I do not know how to use it. If you can
guide me on how to use it, I can better understand your software.
Jitesh Sah (18210103)
M.Tech. Microelectronics and VLSI Design,
Electrical Engineering
IIT Gandhinagar
…On Mon, Sep 16, 2019 at 7:28 PM Taichi Ishitani ***@***.***> wrote:
My previous answer is wrong.
Can you use Verdi tool for debugging?
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taichi-ishitani
commented on August 16, 2024
Before running simulation, you may need following steps.
- Set an environment variable named
NOVAS_HOME- This variable show the home directory of Verdi tool
- Update Makefile to adapt to old VCS version
- Add
-lcato following line onvcs.mk Line 7 in 9e70d07
- The
-debug_alloption is not needed
- Add
Then, I think you can use FSDB dump.
To open FSDB dump file, hit command below on the work directory.
$ verdi -simBin ../simv -ssf dump.fsdb
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JEETIITGN
commented on August 16, 2024
Dear Taichi-Ishitani
I tried simulating your tnoc in Verdi. I used the following command and
received some errors.
$ make clean; make DUMP=fsdb
The dump of error I received is:
*Top Level Modules: fsdbDumpDesign$$ topWarning-[UII-L]
Interface not
instantiated/home/jeet/Async_Priority/compile_loc/tnoc/rtl/common/tnoc_address_decoder_if.sv
<http://tnoc_address_decoder_if.sv>, 3 Interface 'tnoc_address_decoer_if'
defined in logic library 'work' is never instantiated in design. It will
be ignored.TimeScale is 1 ns / 1 psError-[UST] Undefined System Task Call,
unknown line number Undefined System Task call to '$fsdbDumpvars'. CPU
time: 5.834 seconds to compilemake[2]: *** [compile_simv] Error 255make[2]:
Leaving directory
`/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'make[1]:
*** [run_simv] Error 2make[1]: Leaving directory
`/home/jeet/Async_Priority/compile_loc/tnoc/sim/router_data_width_64_vc_2'make:
*** [tnoc_router_sample_test] Error 2*
PFA the VCS log file.
Jitesh Sah (18210103)
M.Tech. Microelectronics and VLSI Design,
Electrical Engineering
IIT Gandhinagar
…On Mon, Sep 16, 2019 at 8:35 PM Taichi Ishitani ***@***.***> wrote:
Before running simulation, you may need following steps.
1. Set an environment variable named NOVAS_HOME
- This variable show the home directory of Verdi tool
2. Update Makefile to adapt to old VCS version
- Add -lca to following line on vcs.mk
-
https://github.com/taichi-ishitani/tnoc/blob/9e70d0749a06b48c77723d3999cc9d80eb24d1e1/sim/common/vcs.mk#L7
- The -debug_all option is not needed
Then, I think you can use FSDB dump.
To open FSDB dump file, hit command below on the work directory.
$ verdi -simBin ../simv -ssf dump.fsdb
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taichi-ishitani
commented on August 16, 2024
Hi @JEETIITGN ,
Can you try to use VPD dump instead of FSDB dump?
VPD dump is integrated with VCS natively so I think using VPD dump can reduce debug time.
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taichi-ishitani
commented on August 16, 2024
Hi @JEETIITGN ,
Do you have any topics for this ticket?
If no, can you close this ticket?
Off cause, you can open a new ticket if you have any questions, problems, etc.
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JEETIITGN
commented on August 16, 2024
Hi Taichi,
I tried to create DUMP.vpd using the command
$make clean; make DUMP=vpd
It successfully builds without any error but does not generate DUMP.vpd file in the /tnoc/sim/router_data_width_64_vc_2 directory. Can you help me regarding it? Also, since I am new to simulation using Verdi, can you please send some commands as well?
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taichi-ishitani
commented on August 16, 2024
Work directories for each tests will be created during make command execution.
For example:
- tnoc_router_sample_test
- tnoc_router_random_test
You can file VPD dump files named dump.vpd from the work directories and use the command below to open the dump file.
$ cd tnoc_router_sample_test
$ dve -full64 -vpd dump.vpd
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taichi-ishitani
commented on August 16, 2024
Please feel free to open a new ticket if you have any questions, problems, etc. 😄
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Related Issues (20)
- Config の最大値/既定値をマクロにする
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