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Eagle libraries pretty footprints...
This project forked from esden/pretty-eagle-libs
Eagle libraries pretty footprints...
All footprints in this collection are released under the CC-BY-SA 3.0 license. It is ok to use these footprints in any project without any liabilities. The footprints are based on the following datasheets: Molex connector library (pel_molex): ------------------------ 53398: http://www.molex.com/pdm_docs/sd/533980271_sd.pdf 53047: http://www.molex.com/pdm_docs/sd/530470210_sd.pdf 53261: http://www.molex.com/pdm_docs/sd/532610271_sd.pdf Dual terminal components library (pel_dipol_comp): -------------------------------------------------- 0603, 1206 footprints: http://www.ibselectronics.com/pdf/pa/walsin/smt_notes.pdf Tantal footprints: http://www.kemet.com/kemet/web/homepage/kfbk3.nsf/vaFeedbackFAQ/2209BDBA03843BBF85256BCD004EBC11/$file/f2100e.pdf STM32 microcontroller footprints (pel_stm32): --------------------------------------------- Medium density: http://www.st.com/stonline/products/literature/ds/13587/stm32f103rb.pdf Footprint design rules: ======================= These rules apply to all footprints contained in the pretty-eagle-libs library. They are only applicable to this library and in many cases are a matter of taste. General rules: -------------- * >NAME macro should be on tName layer * >VALUE macro should be on tValue layer * All texts (>NAME, >VALUE aso) need to have the following settings (to acheve line thickness of 6mil): * Font: Vector * Size: 24mil * Ratio: %25 * All drawings that go on the silkscreen have to be on tPlace and bPlace layers * Line thickness has to be 6mil * No part of the drawing should overlap with pads and if possible not overlap with tStop * The drawing has to be as simple as possible to reflect only the placement and orientation of the part nothing more (i.e. the outline of the part) the only exception to that rule are the part type markings for capacitors, resistors, inductors, led's aso. that share the same type of footprint and outline. (this is to simplify manual population of the pcb) * All drawings should reflect the part outline on the tDocu and bDocu layers for place plan generation. (Nothing on that layer goes on the PCB it is only for paper print and documentation) * Line thickness has to be 6mil * The drawing may overlap pad areas of the footprint * The drawing has to be simple and if possible reflect the part type and orientation of the part * All drawings have to contain a tGlue bGlue layer drawings for glue application, to make two sided reflow population possible * In general that is a square area under the part Dual terminal component rules: ------------------------------ * All types of parts receive a geometrical marking between the pads * Resistor: Unfilled rectangle * Non Polar Capacitor: Circle/Oval * Polar Capacitor: Circle/Oval and a Bar indicating the negative pole * LED: Triangle and a Bar * Inductor: Filled Rectangle * The part type marking is as wide as the dummy track area stated in the smt_notes.pdf
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