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mohamed-karaoui avatar mohamed-karaoui commented on June 12, 2024

This patch should fix the issue (at least temporarly):

diff --git a/tool/alignment/pyalign/Linker.py b/tool/alignment/pyalign/Linker.py
index 710d6d3..64494b9 100644
--- a/tool/alignment/pyalign/Linker.py
+++ b/tool/alignment/pyalign/Linker.py
@@ -90,6 +90,14 @@ class Linker:
                for symbolName in Globals.SYMBOLS_BLACKLIST[section]:
                        output_buffer.append("\t*(" + symbolName + ");\n")

+             # *This solve the problem of compiler inserted function: float function such as __extenddftf2
+             # (these function lands in the default *text section at the end of other function specific fuunctions)
+             # This leads to section with different size on Xeon and ARM(bigger) binaries which in turn leads to
+             # a segfault, since the DSM check the address at origin and when not found, trigger the fault!
+             # *The solution is to make sure that both section (on ARM and Xeon) have the same size.
+             # This alignement sould do just that (at least for many cases!)
+             output_buffer.append("\t. = ALIGN(0x100000);\n")
+
              # Section "closing" part
              output_buffer.append("}\n") 

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acarno avatar acarno commented on June 12, 2024

@mohamed-karaoui That did the trick. Maybe submit that as a patch via pull request? Thanks!!

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rlyerly avatar rlyerly commented on June 12, 2024

I know this patch fixes this particular problem for EP, but it's not very robust (plus having gigantic alignment directives all over the place balloons the size of the binary). @olivierpierre is there a way we can accumulate the architecture-specific & blacklisted symbol sizes in order to safely align the next section to the correct page across all architectures?

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olivierpierre avatar olivierpierre commented on June 12, 2024

I'll have to look at this, can we attach the sources for a test case here? In the meantime, I recommend using Mohamed solution, some ideas to make it lighter:

  • Potentially the amount of padding can be reduced imo, I doubt arm is adding 1MB of code at the end of the .text section
  • It seems this padding can be added only at the end of selected section (.text., any other?)

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acarno avatar acarno commented on June 12, 2024

@olivierpierre Any program will do, but here's a simple hello world program for fun :)

More accurately, anything compiled with Popcorn's musl library will do, since that's where the soft float routines originate.

test.tar.gz

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acarno avatar acarno commented on June 12, 2024

I believe I've found a better (?) fix that eliminates the soft float libraries altogether. Based on a comment on a StackOverflow question I asked and a post on the llvm-dev listserv, I tracked down the following code in <LLVM_SRC>/tools/clang/lib/Basic/Targets.cpp (lines 4950-4991):

class AArch64TargetInfo : public TargetInfo {
  virtual void setDescriptionString() = 0;
  static const TargetInfo::GCCRegAlias GCCRegAliases[];
  static const char *const GCCRegNames[];

  enum FPUModeEnum {
    FPUMode,
    NeonMode
  };

  unsigned FPU;
  unsigned CRC;
  unsigned Crypto;

  static const Builtin::Info BuiltinInfo[];

  std::string ABI;

public:
  AArch64TargetInfo(const llvm::Triple &Triple)
      : TargetInfo(Triple), ABI("aapcs") {

    if (getTriple().getOS() == llvm::Triple::NetBSD) {
      WCharType = SignedInt;

      // NetBSD apparently prefers consistency across ARM targets to consistency
      // across 64-bit targets.
      Int64Type = SignedLongLong;
      IntMaxType = SignedLongLong;
    } else {
      WCharType = UnsignedInt;
      Int64Type = SignedLong;
      IntMaxType = SignedLong;
    }

    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
    MaxVectorAlign = 128;
    MaxAtomicInlineWidth = 128;
    MaxAtomicPromoteWidth = 128;

    LongDoubleWidth = LongDoubleAlign = SuitableAlign = 128;
    LongDoubleFormat = &llvm::APFloat::IEEEquad;

By changing the last two lines here, I was able to force the long double type to 64 bits (the same size as a double) on ARM64:

    LongDoubleWidth = LongDoubleAlign = SuitableAlign = 64;
    LongDoubleFormat = &llvm::APFloat::IEEEdouble;

This removed all reference to __extenddftf2 and (it appears) all other soft float library routines.

So far, I've tested this by:

  1. Successfully rebuilding the compiler
  2. Successfully rebuilding the Popcorn libraries (musl, stack transformation, and migration)
  3. Successfully building an NPB binary (CG, class A, make-popcorn-explicit branch)
  4. Successfully running & migrating the binary

I believe further testing is probably needed (I'll be working with this modified version of the compiler for a while to see if any bugs pop up), but as of right now it's looking promising.

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rlyerly avatar rlyerly commented on June 12, 2024

This is awesome, thanks! Once you verify that it works, you can submit a pull request or let me know if you want me to implement. Just a couple of mental notes here that I don't want to forget:

  1. We should make this command-line selectable if possible, so that we can enable automatically with "-popcorn-*" but not force users to use it if they don't want. We also need to document that this is enabled with the Popcorn flags

  2. This fix needs to be applied to all architectures, including PowerPC & X86 (& maybe RISCV if we go that direction)

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acarno avatar acarno commented on June 12, 2024

@rlyerly I'm going to test it for another day or two, but I'll try to put together a pull request for at least the ARM changes.

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acarno avatar acarno commented on June 12, 2024

Additional note: requires modifying arch/aarch64/bits/float.h in musl (replace every field except DECIMAL_DIG with values from arch/arm/bits/float.h.

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