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projectoberon2013's People

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ilovb avatar kpmy avatar

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valexey madzi norayr aixp 8l qfhuang yantrabuddhi ajinkyakulkarni kevinku flytreeleft rsdoiel marinusmaurice rnpkr simrit1 ryzhykovoleksandr

projectoberon2013's Issues

General questions

First, let me say this project looks great!

Does anyone know if N. Wirth looks at this repository? Is this done in cooperation with him, or just according to his license? Would changes here get absorbed by him "upstream", or is there some other "upstream" that is better?

I'm a long-time Verilog programmer, and I started hacking on the Verilog. Now that I found this repo, it seems that the Verilog files are generated from the provided Lola files. But I don't see the mechanism for that conversion. Do I have to do that in an (emulated) Oberon system? Are there instructions around for how to make that conversion?

I'd like to see this machine run on a larger selection of FPGA boards than that one Digilent board (I have other FPGA boards, but not that one). My Verilog changes have to do with portability and hardware (FPGA) abstraction, and making it usable in simulation with Icarus Verilog.

I'd ask these questions in private messages to kpmy and/or N. Wirth directly, but don't see a way to do that.

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