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Open Hardware SNES Cartridge with save capability

snes super-famicom cartridge super-nintendo nintendo sram feram retrogaming retrocomputing retrogames

snes-feram-cart's Introduction

SNES FeRAM Cart

A Open Hardware SNES Cartridge with save capability

What is that?

A repro cartridge PCB for SNES and Super Famicom consoles compatible with LoROM and HiROM software and save capability using FeRAM memory. Its a open hardware project and can be modified with no restriction

This project was possible thanks to poorstudenthobbyist (Very nice and informative guides) and whicker (Showed the basics of how to wire a FeRAM to SNES), as well as other members of NESdev forums.

Why is that?

While there are very nice comercially available repro PCB solutions, these are closed solutions that often doesn't fit the needs of everyone, specially concerning availability of parts, so, making this project open is not only a way to give back to the community that helped me alot, but also to give the ones that need a more versitile way to solve their problems. I know that the way that this PCB was designed may not fit everyone, but i hope that the ability to modify this project as one needs solves this.

I also find the canibalization of original cartridges for making repros, while understandable in many cases, discusting, so, may this project help to curb this practice.

Features as of now

Suports SNES and Super Famicom
ROM Support for up to 4MB
HiROM and LoROM software (set by jumpers)
32KB of FeRAM for saving (256kb)
No need for backup battery
Rudimentary ROM bank switch (Permits multiple games on same ROM)
SuperCIC support
DOES NOT SUPPORT SPECIAL CHIP GAMES (while i would love to, this is quite away from my capacity as of now)

Component List:

1x FM1808B;
1x 27C322 (May use other 27CXX memories with some minor modifications);
1x 74HC139 (or LS);
1x 4081;
1x 4071;
2x 74HC245;
1x SuperCIC (PIC12F629 model);
1x Led (Optional, only used for SuperCIC)
4x 1K Resistors (5x if using the LED with the SuperCIC);
1x 4 channel DIP Switch;
2x 10nF Capacitors;

Technical details

This project was developed using KiCAD and can be easily modified and studied by using it. Terminals are left in the PCB for all cartridge port connections for testing, but these can easily be removed if wanted.

4081 and 4071 circuitry help to control backup RAM access and also permit FeRAM correctly reading and writing. If

While bank switching is present, its use is not absolutely required for the cart to work. In this case, the resistors are not needed, just short each SW1 channel (as if it were on).

Also, while save capability is present, it is not required for the cart to work. 4071 and 4081 are still required in these cases

SuperCIC have been tested by other users and works. A SOIC8 footprint will be added aswell in the next commit for more package options.

How to use

The ROMs to be written to the EPROM need to be headerless and byteswapped, this is very important. The byteswapping need is a artifact of my prototyping process and may be changed in the future.

Be sure that all chips are in the correct orientation. KiCAD stock footprint silkscreen are quite bad at indicating chip's orientation. New clearer silkscreens for the footprints may be added in the future.

ROM type: HiROM and LoROM are selected by shorting the corresponding side of all the jumpers to the center, HiROM ones are annotated with H and LoROM with L.

Bank Switching: The user may write multiple roms to the same EPROM, the DIP switch controls which area of the EPROM is read by the SNES/Super Famicom; The minimum bank size is 256KB. Each of the switches connect a memory address line between the system and the EPROM: when the switch is on, the respective address line is controlled by the SNES; When off, the EPROM adress line is pulled-up and cut from SNES control. the address lines are A20, A19, A18, A17 (considering LSB as A0). To select the desired bank, turn the switches on and off acordingly to the begining address that the ROM occupies in the EPROM.

Examples:

ROM_x begin at 0x100000 -> Switch just A19 off (pull-up);
ROM_y begin at 0x180000 -> Switch A19 and A18 off;

This technique may not be compatible with save supporting SNES/Super Famicom software.

How to make multirom file: Just use the CMD command "copy /b rom_x.bin + rom_y.bin + rom_z.bin rom_result.bin" to join them to one file. One may join how many ROMs he wants to, just be shure that the result file is smaller than the total size of the EPROM and that the ROMs fit correctly to each desired bank to make software switching possible.

Disclaimer

I'm not an professional engineer and created this project as a hobby, this said, problems and errors maybe present and in need to be corrected. I'll try you to help the best as I can if any problems arrise but be aware that they may exist.

Happy playing!

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snes-feram-cart's Issues

Does this design work?

Hi.
I have made a number of these but I can't get any of them to work.
I am trying V3.1.
I am trying many HiROM images and have all the jumpers set to H.
I have all the dip switches turned on.

I have a wire jumper from pin 1 to pin 20 of U5 to fix the missing 5v connection to pin 20 of U5. Is this correct?
Can I confirm that the silk screen for U1, U2 and U7 is the wrong way around and all of these chips have their pin 1 closest to the left side of the board where the dip switches are? That is opposite to the U labels on the silk screen.
Are any other markings on the silk screen wrong?

When you say "byte swapped" do you mean byte swapped using a tool like Wasabi or do you mean 16bit endian byte swapped? I have tried both and neither worked.

I know that my CIC chip works as it works successfully in other designs.

I don't know what to try next. All attempt give a black screen.

I have built other peoples designs without issue but can't seem get this one to work.
Any help or advice would be greatly appreciated.
I want to use this design as it has many desirable features and looks like it is the best one yet.

Oh, and another little thing. In the README.dm in the paragraph about bank switching it talks about the Sega Genesis and not the SNES.

Thanks.

tsop with adapter

Can tsop be used with an adapter? If so, what tsop model could I use? The m27c322 is giving me problems when ordering them, 3 out of 5 don't work.
Thanks and regards.

Problem on the SRAM enable logic of the 4081-U1B part

Thanks for your nice project. I'm reading your schematic yesterday, with an SNES cart mapping doc on "http://gatchan.net/uploads/Consoles/SNES/Flashcard/SNES_MemMap.txt"
and "https://wiki.superfamicom.org/schematics-ports-and-pinouts"

I found the SRAM mapping is different from what the doc described. So I create this issue to request your help on confirming if it's intended or just small fault on drawing schematic.

(All address pin name below is referencing to CartSlot pin name, not the NET name in your KiCAD project.)

HiROM mode

With this doc the SRAM enable logic equation in "HiROM mode" is:

!SRAM_CE = (!A15 & BA5 & A14 & A13) & (!nCART & nRESET)
or 
!SRAM_CE = (!BA6 & BA5 & A14 & A13) & (!nCART & nRESET)

and the SRAM should be mapped to segment $20-$3F and $A0-$BF.

When JP1-JP5 shorted with pin1-pin2.(Enable HiROM mode)
Focusing on the part (!A15 & BA5 & A14 & A13) or (!BA6 & BA5 & A14 & A13):

4071-U2A part is corresponding to (!A15 and !BA6) which is OK for general adaption.
4081-U1A part is corresponding to (A14 & A13).
But for 4081-U1B part, the equation in your schematic is (BA4 & BA5). Which contains an additional BA4.
This makes the SRAM be mapped to segment $30-$3F and $B0-$BF. Which is different from the known doc.

LoROM mode

With this doc the SRAM enable logic equation in "LoROM mode" is:

!SRAM_CE = (Vcc & BA5 & BA4 & !A15) & (!nCART & nRESET)
or 
!SRAM_CE = (BA6 & BA5 & BA4 & !A15) & (!nCART & nRESET)

and the SRAM should be mapped to segment $70-$7D and $F0-$FF.

When JP1-JP5 shorted with pin3-pin2.(Enable LoROM mode)
Focusing on the part (Vcc & BA5 & BA4 & !A15) or (BA6 & BA5 & BA4 & !A15):

JP4 connected to /CART filtered segment $7E-$7F. That's ok.
4081-U1A part is corresponding to (!A15). That's ok.
But for 4081-U1B part the equation in your schematic is (BA6 & BA5). So the BA4 is missed in expression.
This makes the SRAM be mapped to segment $60-$7D and $E0-$FF. Which is different from the known doc.

My modification

If the above problem is indeed mistake in drawing. I think the modification can be like below.

The solution A uses the expression (BA6 & BA5 & BA4 & !A15) in LoROM mode. It requires an additional AND gate. So I added an 4081. Or it can be achieved with an 3-input AND gate with BA4 BA5 BA6 as input.

The solution A uses the expression (Vcc & BA5 & BA4 & !A15), so the Vcc can be skipped in AND. The additional AND gate component can be saved. The jumper can also be moved to right of the 4081, thus the +5V Vcc can be skipped for HiROM mode.
(Note: I'm still not clear if (Vcc & BA5 & BA4 & !A15) can be apply to all game, as I think this constraint is more wide than adding BA6. I'm not sure if it will interfere other logic in the corresponding page. I'm not that familiar with SNES.)

I have made pcb in january

What problems can I have? I have pcb model january but if the pin 20 is wrong, can I solution this problem? Is a important problem? Sorry for my english, I hope you understand my cuestion. Thanks

U5 has no +5V power connected to pin 20

Have you tried your Kicad PCB?
U5 has no +5 power connected to pin 20.
Perhaps the CMOS just works?

FM16W08-SG (64Kbit)

Hi sonnic,

I would like to use FM16W08-SG (64Kbit).
I see that only pin 1 and pin 26 are not used with FM16W08.
Should I do something else with FM16W08 when its for Hirom or Lorom use?
Will adress pins changes for FM16W08-SG if I will use it for Hirom or Lorom game? (Like in the case of FM18W08).
Or all I need to do Is just tied all pins to respective address names, except pin 1 and 26 (that need to be tied to GND).
I dont understand why for 256Kbit FRAM we need to have different pin connection for HiROM and LoROM ?
And for other size like 64Kbit and 16Kbit one schema for both?
Here is my visual schematic how to connect SNES for FRAM like FM16W08, FM18W08,
or use one of them (FM16W08 or FM18W08) like 16Kbit size FRAM.
Can you confirm me if you think that it will works?

Thank you for help.