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RISC-V CPU

清华大学《计算机组成原理》2022 秋大实验——五级流水线 RISC-V CPU.

Course Project of Computer Organization & Design, 2022 Fall, THU.

实验由 蒋昊迪 和 邢竞择 完成。

This project is made by Jiang Haodi and Xing Jingze.

实现功能

  • RV32I 的基本指令
  • 基本的中断异常机制及 M,S,U 态切换
  • 页表及虚拟地址转换
  • 优化机制：分支预测、指令缓存、TLB
  • 能够运行三个版本的监控程序以及 uCore 操作系统

详情可参阅实验报告

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