A simple AXI demo example
This is AXI memory controller with WDATA and AWADDR re-transmission feature in the case of consecutive NACKs (bad BRESP from AXI slave)
TODO :
- Solve Xilinx AXI protocol checker issue
- Replace AXI slave code with my own AXI slave code
- Add skid buffer for better STA performance
- Formally verify the entire AXI protocol transactions
Credit : @alexforencich