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digital-soc-design's Introduction

Digital-Soc-Design

Day 1

The LAB for day 1 gives the complete flow about using the SKYWATER 130nm PDK, Openlane EDA

Open the working Directory

Going to location

  cd Desktop
  cd work/tools
  cd openlane_working_dir
  cd openlane

To open the Openlane

openlane initiation

After getting into the directory, enter the commands

  docker
  pwd
  ls -ltr

To open the openlane in interactive mode,

 ./flow.tcl -interactive

To prepare the openlane,

  package require openlane 0.9
  prep - design picorv32a

Synthesis

To run the Synthesis

 run_synthesis

synthesis

-> After Synthesis is completed, the message is shown that the "Synthesis was successful"

-> This contains all the details about the synthesis of the picorv32a

  • The Chip Area of the module 147712.918400 chip area

  • Number of cells: 14876 no of cells

  • Number of FF: 1613 no of flip flops

-> Particularly we are interested in finding the Flop ratio. This can be calculated by using the formula:

         Flop ratio in (%) = Total No of D-FF
                           --------------------  X 100
                            Total No of Cells

                          = 1613
                          --------   X 100
                            14876 

                          = 10.8429685

Synthesis Report

The Synthesis Report are found in the directory

   ~/Desktop/work/tools/openlane_working_dir/openlane/designs/picorv32a/runs/29-03_15-37/reports/synthesis/1-yosys_4.stat.rpt

The synthesis Results are found in the directory

   ~/Desktop/work/tools/openlane_working_dir/openlane/designs/picorv32a/runs/29-03_15-37/results/synthesis/picorv32a.synthesis.v

Day 2

Floorplanning

The LAB for day 2 gives the complete flow of the Floorplanning and the placement process

After the Synthesis process, type the command for running the Floor planning configuration directory

The configuration files are inside the location

  /Desktop/work/tools/openlane_working_dir/openlane/configurations/README.md

To run floorplan

  run_floorplan

we will be getting a success message like this floorplan_success

In this particular location from the floorplan.def file, we can able to see the area of the chip area

         1000 unit distance = 1 Micron

         Distance in micron = value
                            ----------
                               1000

        Die width in micron = 660685 
                             ---------
                               1000
                            
       Die height in micron =  671405 
                              ---------
                                1000

      Area of die in micron = 660.685*671.405 Square micron 

Open this directory to initiate the Magic Tool magic location

Locate to this directory

  ~/Desktop/work/tools/openlane_working_dir/openlane/designs/picorv32a/runs/29-03_15-37/results/floorplan
 magic -T /home/vsduser/Desktop/work/tools/openlane_working_dir/pdks/sky130A/libs.tech/magic/sky130A.tech lef read ../../tmp/merged.lef def read picorv32a.floorplan.def &
  • Floorplan def in Magic magic opening

  • Horizontal metal layer horizontal metal layer

  • Vertical metal layer vertical metal layer

  • Standard cells standard cells

Placement

To run the Placement, the command is run placement

    run_placement

Commands to load placement def in magic placement location

    magic -T /home/vsduser/Desktop/work/tools/openlane_working_dir/pdks/sky130A/libs.tech/magic/sky130A.tech lef read ../../tmp/merged.lef def read picorv32a.placement.def &
  • Floorplan def in magic

placement chip

  • Standard cell placement

placement of standard cells

digital-soc-design's People

Contributors

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