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View Code? Open in Web Editor NEWThis adds partial support of AVX2 and AVX-512 to gem5.
License: BSD 3-Clause "New" or "Revised" License
This adds partial support of AVX2 and AVX-512 to gem5.
License: BSD 3-Clause "New" or "Revised" License
I was running an AVX2 code with VXORPD_XMM_XMM
instruction with O3CPUAll debug flag on to trace the pipeline execution. And I hit an assertion failure at here (in X86StaticInst::printReg
):
gem5-avx/src/arch/x86/insts/static_inst.cc
Lines 125 to 126 in c5aa96a
I noticed that this instruction is decoded to three microops including the vclear
microop to clear the higher bits. The assertion failure is caused by the vclear
due to the destSize is 0 (which is not assigned in the microop).
The calling path is as follows:
disassemble(thisPC.instAddr())
-> generateDisassembly(pc, symtab)
-> printDestReg(response, 0, destSize);
-> printReg(os, destRegIdx(reg), size);
-> assert(...);
I wondered if I am doing the right thing? If so, whether the assertion condition should be changed, or the vclear
microop and the macroop to microop conversion
should be updated?
Hi, All:
Thanks for the great work for supporting avx in gem5.
Today, I have met a problem when I run the example of avx_test.
If _mm512_store_ps() is used to store an _mm512 variable into the main memory.
The code is like below:
float a= (float *)aligned_malloc(64, 16); _mm512 b; _mm512_store_ps(a,b);
The gem5 reported an error: panic: Unrecognized/invalid instruction executed:
panic: Unrecognized/invalid instruction executed:
{
leg = 0x10,
rex = 0,
evex = 0x842,
op = {
type = two byte,
op = 0xef,
},
modRM = 0xe4,
sib = 0,
immediate = 0,
displacement = 0
dispSize = 0}
Memory Usage: 8566948 KBytes
Program aborted at tick 17968375710
Then the simulation is terminated.
But if I change it into the following code:
void func(){
float a[16];
__mm512 b;
_mm512_store_ps(a,b);
}
It works fine.
Do you have any clue about why it happens and how to fix it?
Thanks in advance.
Best,
Dong
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