Comments (1)
If an instruction form is not part of the (local) OSACA database, you can add it by using the automatically created micro benchmark file in ~/.osaca/benchmarks/
. In your case there should be a addl-mem-imd.S
and addl-mem_imd-TP.S
to measure the latency and the throughput, respectively. After measuring using ibench, OSACA can include the measured results using the --include-ibench
flag. Please have a look at the example section of the README for more details.
However, if you cannot benchmark your instruction, I recommend you in your case to add the instruction form manually. Open the csv file for your specific architecture at ~/.osaca/data/
, copy the line for the add-mem_imd
instruction form and change the mnemonic in the new line from add
to addl
, the throughput and latency should be the same.
Either way, as soon as the instruction form is added to the database file, OSACA should recognize it in the next run.
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Related Issues (20)
- No throughput/latency information for vbroadcast HOT 2
- [REQUEST] Add support for handling comments generated by fcc compiler at the beginning of instruction code.
- [BUG] Register dependency not detected with x86 conditional move instructions
- [REQUEST] Support Intel assembly syntax HOT 2
- Hex immediate are not recognized. HOT 7
- Bug with working with A64FX assembly code. HOT 5
- Import asmbench result HOT 1
- Instruction is missing HOT 1
- x86 OR instruction breaks LCD analysis HOT 1
- x86 NOT instruction doesn't add a cycle to the critical path HOT 1
- [ARM] Multiply-accumulate output register dependency not recognized HOT 1
- iacaMarks.h compatibility HOT 1
- [ARM] Incorrect parsing of NEON instructions targeting individual lanes HOT 4
- [ARM] Incorrect dependency graph for store dependent on post-indexed load HOT 1
- Parallel LCD computation fails on macOS HOT 1
- OSACA fails on godbolt.org with KeyError: "Port 'D' not in port list." HOT 1
- Profile OSACA to find out what parts are slow and where we have to change code for performance improvements HOT 2
- Add new u-arch: AMD Zen4 (Genoa)
- Add new u-arch: Intel Sapphire Rapids (SPR)
- Add new u-arch: Neoverse N1 (Ampere Altra Max) HOT 1
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