TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip.
To learn more and get started, visit https://tinytapeout.com.
- Add your VHDL files to the
src
folder (no subfolders currently allowed, vhdl files must have the fileending .vhdl). - Edit the info.yaml and update information about your project, paying special attention to the
top_module
property. Leave thesource_files
property as it is, because the ghdl tool will generate the project.v file. - Edit docs/info.md and add a description of your project.
- Optionally, add a testbench to the
test
folder. See test/README.md for more information.
The GitHub action will automatically build the ASIC files using OpenLane.
- FAQ
- Digital design lessons
- Learn how semiconductors work
- Join the community
- Build your design locally
- Submit your design to the next shuttle.
- Edit this README and explain your design, how it works, and how to test it.
- Share your project on your social network of choice:
- LinkedIn #tinytapeout @TinyTapeout
- Mastodon #tinytapeout @matthewvenn
- X (formerly Twitter) #tinytapeout @matthewvenn