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View Code? Open in Web Editor NEWGameboy Advance Emulator for final year project
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Model registers withing CPU
Acquire BIOS rom image
Figure out steps required for ARM7TDMI implementation
Investigate implementing a gdb stub
Choose and set up graphics lib
Define memory access interface
Child of #10
Setup loading BIOS and Game into memory class
Write tests for memory access interface
Waiting on #13 to be finished
ARM SWI
Child of #14
Add logging for errors and optional for instructions being run
Prototype CPU and Memory implementation using unicorn
clang format setup
ARM Single Data Transfer
Child of #14
Implement Thumb decoder
Child of #15
Thumb ISA generation
Child of #10
ARM Decoding
Child of #14
Create parent system class
Create empty class declarations for any expected required components
ARM Single Data Swap
Child of #14
Define modes and mode switching
Child of #10
Get to running point of ARMWrestler and start fixing
Add basic interrupt handling for VBlank
Fix bug with TEQ and NE condition
Memory access interface
Child of #10
ARM ISA function generation
Child of #10
PC advancement and run instructions
Try using AdvanceOS
ARM Branch & Exchange
Child of #14
ARM Branch
Child of #14
Acquire game or test ROM image
ARM Multiply
Child of #14
Get BIOS to run fully
Change exits to go to breakpoint prompt
Condition checks
Child of #10
ARM Halfword Data Transfer
Child of #14
CPU Pipeline Implementation
Child of #10
Data Proc R15 Dest Edge Case
Writing to R15
When Rd is a register other than R15, the condition code
flags in the CPSR may be updated from the ALU flags as
described above.
When Rd is R15 and the S flag in the instruction is not set
the result of the operation is placed in R15 and the CPSR is
unaffected.
When Rd is R15 and the S flag is set the result of the operation
is placed in R15 and the SPSR corresponding to the
current mode is moved to the CPSR. This allows state
changes which atomically restore both PC and CPSR. This
form of instruction should not be used in User mode.
Change ARM Ops into multi param functions instead of taking vector list. To allow for reuse with Thumb
Simple BG display
PSR Transfers
Child of #36
Register and memory watching
Create Memory class basic
Create model of memory
ARM Data Processing
Child of #14
Status Register Flags
Be able to set and get specific flags for the status registers
Implement proper memory cycle timings and wait state control
ARM Undefined Catching
Child of #14
Choose logging library
Keep track of cycles and set VBlank flags/interrupts accordingly
ARM Block Data Transfer
Child of #14
Map Thumb to ARM
Child of #15
Investigate CPU implementation using unicorn
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