raczben / fliplot Goto Github PK
View Code? Open in Web Editor NEWHTML & Js based VCD viewer
Home Page: http://raczben.pythonanywhere.com/
License: Apache License 2.0
HTML & Js based VCD viewer
Home Page: http://raczben.pythonanywhere.com/
License: Apache License 2.0
I'm happy that you use this fliplot project, but this project has reached its end... I'm sorry :(
I (the author) finished my profession as an engineer, and I will be Jesuit priest. :)
What could you do?
The signal names should be able to set in the waveform (names-col). Two defaults: the name of the signal, and with the full path.
Depends on #4
If a signal has multiple changes in a given time slack, the "Move cursor to next transition" does not work
The web deployment of fliplot at raczben.pythonanywhere.com has expired.
Subtasks:
Support unbounding: All bus (i.e., bit-vectors) should be able to expand or unbound to bits of that vector. The bits should be plotted below the original signal. I don't know which level should handle this. Should all bits of all bit-vectors be added to simDB, or can it be handled at the waveform-level? This is a typical CPU vs RAM problem. If we add all bit of all signals to simDB, it will require more than two times bigger RAM! This differs from the general virtual-bus because the radix is not relevant here.
Support signal group: Create a collapsable group. Using the groups, the signals remain distinct signals, but the user can collapse or hide them at once. This (signal groups) can be handled on waveform-level. It does not require touching the simDB.
Support virtual-bus: Signals can build up to a new signal, which will be shown as a new row in the waveform. (Eg.: If we have a 64-bit counter represented by two 32-bit variables, the two 32-bit variables should be concatenated to a 64-bit virtual bus.) This should be handled at the simDB level. This will result in that the radix handling of these virtual signals will be easy. Note that the path and hierarchy have no meaning here, while the "sub-signals" has to be referenced using virtual signals.
Support virtual-variables: Maybe a different feature: Add logical-combination of signals. Any combinational operation of any signals should be supported. Yes, this new virtual-variable should be added to simDB, not only to waveform. This is a more abstract virtual-bus.
Current implementation redraws all bus (aka. bit-vectors) at all zoom-end event. The problem is that d3's data are identified by their order in the array, while wave would require it as value.
Another problem is that the lowest level code (drawing the signal elements) gets the same values multiple times, which can be optimized. I suggest to use less feature of d3 and implement custom functions for the lowest level drawing.
Subtasks:
Plot the signal as a simple line plot.
The radix support (#2) is required by this, analog wave-style
Improve code quality by adding auto/unit tests to fliplot
it would be nice to have waveform comparison feature.
Really nice project we would like to add it to TerosHDL in the future.
https://marketplace.visualstudio.com/items?itemName=teros-technology.teroshdl
how to change starting value of d3 graph. I have timescales data in chunks. from 0-95, 95-180 etc. When 0-95 time scale data display correctly but when I show 95-180 time scale data. the d3 graphs starts from 0 to 180 but it should start from 95 to 180? can someone help me in this regard.
Would be nice if I can use this embedded in a HTML application. Does the server do anything special other than host the stuff?
Left-right scrolling does not update and re-render the waveform.
The root cause is that zoom_fast()
fires a scroll event. Therefore scrolled() called during each zoom_fast event. So scrolled should and should not contain the re-render function.
The scrolled() function should distinguish between "original-scroll" (the render should called), and the "zoom-scroll".
Visualize the simDB, the objects database to be able to see the hierarchy of the design. New signals can be added from this database to the waveform.
This issue has to start with cleaning up the simDB itself. Problems:
Now the Signal object has a references
property pointing to all signal objects, which always have the same value. Check out VCD Wiki: "Several variables can share an identifier if the simulator determines that they will always have the same value. " This, currently used data-structure is the most compact. But, now, we cannot add a particular simulation-object to the waveform, only a Signal instance, so we don't know which object has been added from the references
(i.e, aliases)
A Verilog module descriptor class/instances will be useful to point to the source file or others.
First, why can't I let this, reference-issue go? This is a rare phenomenon. Usually, I want to simulate/add different signals. Ok, but note, that the synchronous-clocks will be the same in the case of the most frequently used, behavioral simulation. Also note, that the clocks have value-change the most frequently. So it requires memory. So do not store the clock multiple times, if it is possible.
Solution candidates for the references problem:
Define a new Object
class, which has a propery: hierarcy
or name
, which describe which simulation-object are we talking about, and another property will be the Signal with the wave
, references
properties. This is a clean way, but it will add another (maybe unnesesary) stack level to getValue()
during rendering: WaveformRow.getValue() ~> SimulationObject.getValue() ~> Signal.getValue()
Another possibility is to update and duplicate Signal objects. Add (more precisely use currently abandoned hierarcy
property) and this will point to one, particular simulation-object. Then duplicate all Signal object if it has any other references
(i.e, aliases). Note, that this won't duplicate the wave
property, which stores the value-changes.
Use-cases:
First, an accurate study needed:
Eg.: Left-right arrows: Shoud they move the whole waveform as scroll, or should they step the cursor on the selected signal's next transaction?
Show in wave and add to wave features are not working properly can someone fix it...
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