Design | Behavior Simulation Test |
Documentation | |
---|---|---|---|
regs | ❤️ | ❤️ | ❤️ |
main_memory | ❤️ | ❤️ | ❤️ |
memory_wrapper | 🤍 | 🤍 | 🤍 |
forward | ❤️ | ❤️ | 🤍 |
fetch | ❤️ | ❤️ | 🤍 |
decode | ❤️ | ❤️ | 🤍 |
execute | ❤️ | ❤️ | 🤍 |
memory | ❤️ | ❤️ | 🤍 |
writeback | ❤️ | 🤍 | 🤍 |
core | 🤍 | 🤍 | 🤍 |
soc (top module) | 🤍 | 🤍 | 🤍 |
csr (ZICSR) | ❤️ | 🤍 | 🤍 |
Integer Multiplication and Division (M) |
🤍 | 🤍 | 🤍 |
Bit Manipulation and Division (B) |
🤍 | 🤍 | 🤍 |
Details | Code |
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Details | Code |
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