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Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

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Each example comes with C/C++ source code, a README, and script or config file. The examples are organized in categories denoted by the directory names:

• Appnotes: A DSP design, a legacy digital up converter appnote.
• Array: Show how to partition memory arrays.
• Interface: Common examples for interface protocols.
• Misc.: Other examples such as the RTL blackbox flow and the LogiCore FFT from Vivado.
• Modelling: The essentials for loops, arbitrary precision types and vectors.
• Pipelining: Illustrating one of the most fundamental concept of HLS.
• Task_Level_Parallelism: Dataflow and free running streams with hls::task.
• Vitis: Kernel examples for the software acceleration flow.

• Using Vitis Unified IDE:
  • vitis-run --mode hls --tcl run_hls.tcl
• Using Vitis HLS (deprecated):
  • vitis_hls -f run_hls.tcl

Note that by default only C simulation and C synthesis will run. Change the value of hls_exec in the Tcl script to run co-simulation and Vivado implementation.