Comments (7)
We work on Xilinx Alevo U200/U250 with Vitis HLS flow. I think it needs some effort to upload to Lattice FPGA board.
from xkisp.
When can complete the Xilink Alevo U200U250 with Vitis HLS flow,
and may we get one from your site to verify, then return to you after verified?
thanks
from xkisp.
Please refer to README, the source files are in /fpga
from xkisp.
thanks for the reply
Is possible to put the code in the model of Xilinx xczu15eg?
can we have your hardware connecting drawing?
thanks again!
from xkisp.
Hi,sir:
is possible to put the source code in Xilinx xczu15eg with any effort?
from xkisp.
I think it's possible. We are also working on some similar Xilinx board.
from xkisp.
Hi, sir
thanks for your reply, would you please share with us about your current experience of implentation.
for example, may i got the Xilink board you had done?
from xkisp.
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