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nuked-md-fpga's Introduction

Nuked-MD-FPGA

nukedmd_logo

by @nukeykt, @ogamespec and @andkorzh, special thanks to @HardWrMan

Cycle accurate Mega Drive emulator. Verilog version of Nuked MD. The goal of this project is to emulate Sega Mega Drive chipset accurately as possible using decapped chips photos.

Mega Drive chipset

Sega Mega Drive chipset consist of 6 integrated circuits + RAM chips:

  • Motorola 68000 (Main CPU)
  • Zilog Z80 (Sound CPU)
  • Yamaha YM7101 (VDP)
  • Yamaha YM2612/YM3438 (FM)
  • Yamaha YM6045 (Arbiter)
  • Yamaha YM6046 (IO)
  • TMSS (later revisions)

There are number of variations of chipsets across mega drive revisions. For example early revisions use NMOS 68k and Z80 chips, while later models switched to CMOS versions. Yamaha later integrated their chips into one big chip named FC1004.

Nuked-MD-FPGA currently targets NMOS 68k, NMOS Z80 and FC1004. No real mega drive used such combination, but Model 1 VA7 would be closest (CMOS 68k, NMOS Z80 and FC1004). Other variants possibly will be emulated in the future.

image

Progress

image

See Progress.md

Audio samples

https://drive.google.com/drive/folders/1RtqB4Rn1jMeVNzONG2wVgWdD4ZHzARxy?usp=sharing

References

Credits

  • nukeykt - RE, verilog implementation
  • org(ogamespec) - FC1004 decap, RE, useful tools, etc.
  • andkorzh - RE
  • HardWareMan - YM2612 decap pics, RE

nuked-md-fpga's People

Contributors

birdybro avatar nukeykt avatar ogamespec avatar sorgelig avatar

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nuked-md-fpga's Issues

Multitap: TeamPlayer Port 1

Buttons B and C are swapped. Checked in Mortal Kombat 3, it affects with all controllers and inputs. B button is going low kick, C button is block

68k module active low or high?

There's no indication of active low or high in the 68k module port definition. I recently tried to use this in a project and assumed it was low. No activity when the CPU was hooked up.

Double checked when using the 68k module in quartus, there's no errors when building (thought it might not be finding the micro code files). Possible to comment the in/out in the 68k module so the manual can be referenced? Thank you for your work @nukeykt.

module m68kcpu

Add additional signals to toplevel

Hi!

I'm trying to port your code to MiSTer. But for a better adoption it would be good to have additional signals:
HBlank, VBlank. Also pixel enable reflecting a current pixel clock since MD may have not only a different pixel clock but even it changes during the line.

Also it would be good to have some CART data request signal as earlier as possible since i need to retrieve the data from SDRAM which requires some time. This signal should be either address strobe or toggling with every request, so it can be distinguished from 2 sequential requests.

Analogue Pocket support?

Just a query, I was wondering if the Analogue pocket would be able to support this amazing Mega Drive core?

DE10-nano support

Just wondering if your builds are compatible with DE10-nano board... Having more Mega Drive cores on the MiSTer project would be great.

TMSS

I tried to compile but I get this error:
"Error (12152): Can't elaborate user hierarchy "tmss:tmss_""

Which TMSS file are you using?

Virtua Racing speedometer wrong

Tested via the current official MisterFPGA update, the speedometer needle is showing as artifacty blocks only. The rest of the game seems to work fine.

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