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dnn_neurosim_v2.0's Introduction

DNN+NeuroSim V2.0

The DNN+NeuroSim framework was developed by Prof. Shimeng Yu's group (Georgia Institute of Technology). The model is made publicly available on a non-commercial basis. Copyright of the model is maintained by the developers, and the model is distributed under the terms of the Creative Commons Attribution-NonCommercial 4.0 International Public License

This is the released version 2.0 (Mar 15, 2020) for the tool.

This V2.0 introduces estimation for on-chip training compute-in-memory (CIM) accelerator; while the previous V1.1 supported inference engine design only.

1. Include comprehensive hardware for on-chip training, to support feed-forward, error-calculation, 
   weight-gradient-calculation and weight-update.
2. Introduce more non-ideal properties of synaptic devices (in addition to V1.1):
   nonlinearity and asysmmetry, cycle-to-cycle and device-to-device variation in weight-update.

For estimation of inference engine, please visit released V1.3 DNN+NeuroSim V1.3

For improved version of on-chip training accelerator with more design options, please visit released V2.1 DNN+NeuroSim V2.1

In V2.0, we currently only support Pytorch wrapper, where users are able to define network structures, parameter precisions and hardware non-ideal properties. With the integrated NeuroSim which takes real traces from wrapper, the framework can support hierarchical organization from device level to circuit level, to chip level and to algorithm level, enabling instruction-accurate evaluation on both accuracy and hardware performance of on-chip training accelerator.

The default example is VGG-8 for CIFAR-10 in this framework: 1. Users can modify weight/error/gradient/activation precisions for training, while some adjusts of "beta" value in function "scale_limit" from file "wage_initializer.py" could be necessary, corresponding values have been provided as example. 2. We temporally only provide the option where: weight/error/gradient precision equals to cell-precision, i.e. one-cell-per-synapse scheme for training evaluation.

Due to additional functions (of non-ideal properties) being implemented in the framework, please expect ~12 hours simulation time for whole training process (default network VGG-8 for CIFAR-10, with 256 epochs).

Developers: Xiaochen Peng, Shanshi Huang.

This research is supported by NSF CAREER award, NSF/SRC E2CDA program, and ASCENT, one of the SRC/DARPA JUMP centers.

If you use the tool or adapt the tool in your work or publication, you are required to cite the following reference:

X. Peng, S. Huang, H. Jiang, A. Lu and S. Yu, ※DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for Training, § IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2020.3043731, 2020.

X. Peng, S. Huang, Y. Luo, X. Sun and S. Yu, ※DNN+NeuroSim: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators with Versatile Device Technologies, § IEEE International Electron Devices Meeting (IEDM), 2019.

If you have logistic questions or comments on the model, please contact Prof. Shimeng Yu, and if you have technical questions or comments, please contact Xiaochen Peng or Shanshi Huang.

File lists

  1. Manual: Documents/DNN NeuroSim V2.0 Manual.pdf
  2. Nonlinearity-to-A table: Documents/Nonlinearity-NormA.htm
  3. MATLAB fitting script: Documents/nonlinear_fit.m
  4. DNN_NeuroSim wrapped by Pytorch: Training_pytorch
  5. NeuroSim under Pytorch Inference: Training_pytorch/NeuroSIM

Installation steps (Linux)

  1. Get the tool from GitHub
git clone https://github.com/neurosim/DNN_NeuroSim_V2.0.git
  1. Set up hardware parameters in NeuroSim Core and compile the Code
make
  1. Set up hardware constraints in Python wrapper (train.py)

  2. Run Pytorch wrapper (integrated with NeuroSim)

  3. A list of simulation results are expected as below:

  • Input activity of every layer for each epoch: input_activity.csv
  • Weight distribution parameters (mean and std) of every layer for each epoch: weight_dist.csv
  • Delta weight distribution parameters (mean and std) of every layer for each epoch: delta_dist.csv
  • Estimation of average loss and accuracy for each epoch: PythonWrapper_Output.csv
  • Estimation of on-chip training system for each epoch: NeuroSim_Output.csv
  • Detailed breakdowns of estimation of on-chip training system for each epoch:
    NeuroSim_Results_Each_Epoch/NeuroSim_Breakdown_Epoch_0.csv NeuroSim_Results_Each_Epoch/NeuroSim_Breakdown_Epoch_1.csv ... ... NeuroSim_Results_Each_Epoch/NeuroSim_Breakdown_Epoch_256.csv
  1. For the usage of this tool, please refer to the user manual.

References related to this tool

  1. X. Peng, S. Huang, H. Jiang, A. Lu and S. Yu, ※DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training, § IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2020.3043731, 2020.
  2. X. Peng, S. Huang, Y. Luo, X. Sun and S. Yu, ※DNN+NeuroSim: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators with Versatile Device Technologies, § IEEE International Electron Devices Meeting (IEDM), 2019.
  3. X. Peng, R. Liu, S. Yu, ※Optimizing weight mapping and data flow for convolutional neural networks on RRAM based processing-in-memory architecture, § IEEE International Symposium on Circuits and Systems (ISCAS), 2019.
  4. P.-Y. Chen, S. Yu, ※Technological benchmark of analog synaptic devices for neuro-inspired architectures, § IEEE Design & Test, 2019.
  5. P.-Y. Chen, X. Peng, S. Yu, ※NeuroSim: A circuit-level macro model for benchmarking neuro-inspired architectures in online learning, § IEEE Trans. CAD, 2018.
  6. X. Sun, S. Yin, X. Peng, R. Liu, J.-S. Seo, S. Yu, ※XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks,§ ACM/IEEE Design, Automation & Test in Europe Conference (DATE), 2018.
  7. P.-Y. Chen, X. Peng, S. Yu, ※NeuroSim+: An integrated device-to-algorithm framework for benchmarking synaptic devices and array architectures, § IEEE International Electron Devices Meeting (IEDM), 2017.
  8. P.-Y. Chen, S. Yu, ※Partition SRAM and RRAM based synaptic arrays for neuro-inspired computing,§ IEEE International Symposium on Circuits and Systems (ISCAS), 2016.
  9. P.-Y. Chen, D. Kadetotad, Z. Xu, A. Mohanty, B. Lin, J. Ye, S. Vrudhula, J.-S. Seo, Y. Cao, S. Yu, ※Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip,§ IEEE Design, Automation & Test in Europe (DATE), 2015.
  10. S. Wu, et al., ※Training and inference with integers in deep neural networks,§ arXiv: 1802.04680, 2018.
  11. github.com/boluoweifenda/WAGE
  12. github.com/stevenygd/WAGE.pytorch
  13. github.com/aaron-xichen/pytorch-playground

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dnn_neurosim_v2.0's Issues

I cannot understand a part of the code. is it a bug or I misunderstand it?

In the file quantization_cpu_np_infer.py line 113-114:

outputPartial= F.conv2d(input, remainderQ*mask, self.bias, self.stride, self.padding, self.dilation, self.groups)
outputDummyPartial= F.conv2d(input, dummyP*mask, self.bias, self.stride, self.padding, self.dilation, self.groups)

why the input of F.conv2d is input, not inputB in line 98. Similar problem in line 256-257,290-291.

but in line 148-149. the input of F.conv2d is inputB

outputPartial= F.conv2d(inputB, remainderQ*mask, self.bias, self.stride, self.padding, self.dilation, self.groups)
outputDummyPartial= F.conv2d(inputB, dummyP*mask, self.bias, self.stride, self.padding, self.dilation, self.groups)

I think the input of conv2d in line 113-114,256-257,290-291 should be inputed bit by bit ,so the input of conv2d should also be the variable inputB .

did I misunderstand that or it is just a bug?
can you explain it? Thank you .

I come back again. some other code I can't understand.

Hi,I come back again. First ,Thank you for your reply.
Today I read the hook.py file,and I can't understand the code below:
In line 20,

activity = write_matrix_activation_conv(stretch_input(input[0].cpu().data.numpy(),k),None,self.wl_input,input_file_name)

You call the function stretch_input(),the first input of this function is input[0].cpu().data.numpy().I check the document of the torch,in the conv2d, the shape of variable input is (minibatch,in_channels,iH,iW).so the shape of the variableinput[0].cpu().data.numpy() is (in_channels,iH,iW),
but in line 56,

item_num = (input_shape[2] - window_size + 1) * (input_shape[3]-window_size + 1)

you use the input_shape[3],is that wrong? this will cause the array to overflow,and you can't get it.

Simlar problem in the input of in line 23,46,which's about function write_matrix_activation_fc.

So did I misunderstand the shape of variableinput,or it is a bug?
can you explain it? Thank you .

The program is stuck on Estimation of Layer 1

We use the DNN_NeuroSim_V2.0 programs, The steps are as follows:

  1. make in NeuroSim folder using CMD in Ubuntu, we can find many .o files
  2. Run train.py, the program is stuck on Estimation of Layer 1,no other logs.
    Could you please help me? Thank you very much.
    捕获

Confusion regarding Device Models

Greetings,

I am a graduate student and have been using the tools being designed by the NeuroSim for some time.

I have originally been working with MLP+NeuroSim framework, and am recently trying to shift my work to the DNN+NeuroSim framework.

My question relates to device models.

In DNN+NeuroSim, how exactly can I toggle between carrying out training and inference via an ideal device model? I know that we could explicitly choose which device model to instantiate in the previous framework, but I have been unable to figure this out in DNN+NeuroSim.

Any help would be appreciated.

Thank you!

I have some problem when I read the code in CHIP.CPP.

Recently ,I read the file Chip.cpp.I have some doubt.
line 652 in chip.cpp define the variable
int weightMatrixRow = netStructure[l][2]*netStructure[l][3]*netStructure[l][4]*numRowPerSynapse;
line 840 in Chip.cpp define the variable
int numRowMatrix = min(desiredPESizeNM, weightMatrixRow-i*desiredPESizeNM);
the numRowMatrix which I think is the row number of weight that in a tile,then I think line 840 should be bellow:
int numRowMatrix = min(desiredPESizeNM*9, weightMatrixRow-i*desiredPESizeNM*9);
becasue there is 9 PE in each tile.
If the line 840 is correct. the numRowMatrix transmit to the variable weightMatrixRowof functionTileCalculatePerformane().
the functionTileCalculatePerformane in file Tile.cpp
line576:int location = i*MIN(peSize, (int) weightMatrixRow/numPE);
line578:pEMemoryOld = CopyPEArray(oldMemory, location, 0, (int)(weightMatrixRow/numPE), weightMatrixCol);the same case in line 581,583.
so here are some problem.
If the weightMatrixRow=desiredPESizeNM,thenweightMatrixRow/numPE stand for what?
can you explain it ? Thank you.

Framework Reconfigurability

I've come across your paper titled "DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training" seeking analytical tools for DNNs. My question is, can this framework be extended for customized neural network models and architectures (like LSTMs) that you did not list in your paper? And is there an option for voltage scaling in your framework? Many thanks in advance.

Simulation got stuct with default configuration

Hello,

I tried train.py with the default configuration (cifar10) with an exceptional changing epoch to a smaller value 8. After training one epoch, NeuroSIM is activated to estimate the hardware evaluation for the trained epoch. However, NeuroSIM got stuck for unknown reasons. I am wondering how long NeuroSIM completes the evaluation of one epoch.

Thanks

image

Inference failed

Hi,
When I run the inference code (After training), the terminal report the following

Traceback (most recent call last):
  File "inference.py", line 99, in <module>
    hook_handle_list = hook.hardware_evaluation(modelCF,args.wl_weight,args.wl_activate)
TypeError: hardware_evaluation() missing 1 required positional argument: 'numEpoch'

Please fix it, thanks

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