Related Issues (20)
- stuck in configuration state
- TxElecIdle should be de-asserted at the same clock cycle the first TS in the Polling state starts to be transmitted HOT 3
- stuck in config lanenum wait (environment is upstream/DUT is downstream) HOT 1
- stuck in config linkwidth start (environment is downstream/DUT is upstream) HOT 1
- DUT_start_polling_e event is triggered before the pipe_linkup_seq waits for it HOT 1
- signal width HOT 1
- Doesn't send idle data in Configuration.Idle
- The idle data sent from DUT at Configuration.Idle are not scrambled HOT 2
- DUT sending wrong data when it stops sending TSes and start sending idle data HOT 6
- DUT is sending DLLP through LPIF while ENV is sending IDLE data through PIPE in Configuration.Idle substate HOT 4
- ENV is not detecting IDLE data
- Can't detect IDLE data when ENV is in config.idle
- Assigning a "reg" type variable using continuous assignment
- DUT stuck in Configuration Idle HOT 1
- The lp_tlp_start and lp_dllp_start signals are asserted at the same time
- TS ID is inconsistent in TS2
- stuck in Recovery.config substate during speed change (Design is down stream)
- get_width issue
- helper_macros.svh issue
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