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License: MIT License
一步一步写MIPS CPU
License: MIT License
问题:
Block Memory Generator
的时候,如果勾选Port A Options
中的Primitives Output Register
会导致存储器输出延迟2个周期。根据我之前看的计组的书,一般情况下应该是1个周期。jump
和branch
指令中,产生跳转信号相比PC会延迟1~2个周期(取决于指令存储器的延迟),因此会多取出1~2个指令,但在实验指导书我没有看到关于阻止多取出的指令执行的内容。PC
的值已经不是branch
指令的地址了,因此跳转地址的偏移量会计算错误。关于上述问题,我用了一些解决方法:
Primitives Output Register
,这样存储器延迟为1个周期。mips.v
文件中添加插入空指令的逻辑。在检测到跳转信号后,下一个周期会劫持原指令并替换为32'h0000_0024
,内容是and 0, 0, 0
,是一条没有意义的指令。PC
而非PCplus4
,这样可以计算出正确的跳转地址。但我并不知道我提到的那些问题是我的理解偏差还是真的笔误,也不知道我的解决方法合适不合适,希望能得到关于这些问题的澄清与指导。
lab_3\rtl\top.v
the instruction's address must be the whole pc[31:0] not pc[7:2]
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