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Reduce the number of RecordWrite in RelocInfo
SelectionDAG merge relocated values unexpectedly
%73 = load %TaggedStruct addrspace(1)*, %TaggedStruct addrspace(1)** %72, align 4, !dbg !5
%74 = bitcast %TaggedStruct addrspace(1)* %73 to i8 addrspace(1)*, !dbg !5
%75 = getelementptr i8, i8 addrspace(1)* %74, i32 63, !dbg !5
%76 = addrspacecast i8 addrspace(1)* %75 to i8*, !dbg !5
%77 = tail call v8cc token (i64, i32, %TaggedStruct addrspace(1)* (i32, i8*, i8*, %TaggedStruct addrspace(1)*, %TaggedStruct addrspace(1)*, i32, i32, %TaggedStruct addrspace(1)*, i32, i32, i32, i32)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_p1s_TaggedStructsi32p0i8p0i8p1s_TaggedStructsp1s_TaggedStructsi32i32p1s_TaggedStructsi32i32i32i32f(i64 0, i32 8, %TaggedStruct addrspace(1)* (i32, i8*, i8*, %TaggedStruct addrspace(1)*, %TaggedStruct addrspace(1)*, i32, i32, %TaggedStruct addrspace(1)*, i32, i32, i32, i32)* null, i32 12, i32 0, i32 2, i8* %63, i8* %76, %TaggedStruct addrspace(1)* %47, %TaggedStruct addrspace(1)* %70, i32 undef, i32 undef, %TaggedStruct addrspace(1)* null, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 0, %TaggedStruct addrspace(1)* %1, %TaggedStruct addrspace(1)* null, %TaggedStruct addrspace(1)* %73), !dbg !5
%78 = tail call %TaggedStruct addrspace(1)* @llvm.experimental.gc.relocate.p1s_TaggedStructs(token %77, i32 19, i32 19), !dbg !5 ; (%1, %1)
%79 = tail call %TaggedStruct addrspace(1)* @llvm.experimental.gc.relocate.p1s_TaggedStructs(token %77, i32 21, i32 21), !dbg !5 ; (%73, %73)
%80 = load i8 addrspace(1)*, i8 addrspace(1)** %65, align 4, !dbg !5
%81 = getelementptr i8, i8 addrspace(1)* %80, i32 339, !dbg !5
%82 = bitcast i8 addrspace(1)* %81 to %TaggedStruct addrspace(1)* addrspace(1)*, !dbg !5
%83 = addrspacecast %TaggedStruct addrspace(1)* addrspace(1)* %82 to %TaggedStruct addrspace(1)**, !dbg !5
%84 = load %TaggedStruct addrspace(1)*, %TaggedStruct addrspace(1)** %83, align 4, !dbg !5
%85 = bitcast %TaggedStruct addrspace(1)* %79 to i8 addrspace(1)*, !dbg !5
%86 = getelementptr i8, i8 addrspace(1)* %85, i32 63, !dbg !5
%87 = addrspacecast i8 addrspace(1)* %86 to i8*, !dbg !5
%88 = tail call v8cc token (i64, i32, %TaggedStruct addrspace(1)* (i32, i8*, i8*, %TaggedStruct addrspace(1)*, %TaggedStruct addrspace(1)*, i32, i32, %TaggedStruct addrspace(1)*, i32, i32, i32, i32)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_p1s_TaggedStructsi32p0i8p0i8p1s_TaggedStructsp1s_TaggedStructsi32i32p1s_TaggedStructsi32i32i32i32f(i64 1, i32 8, %TaggedStruct addrspace(1)* (i32, i8*, i8*, %TaggedStruct addrspace(1)*, %TaggedStruct addrspace(1)*, i32, i32, %TaggedStruct addrspace(1)*, i32, i32, i32, i32)* null, i32 12, i32 0, i32 2, i8* %63, i8* %87, %TaggedStruct addrspace(1)* %78, %TaggedStruct addrspace(1)* %84, i32 undef, i32 undef, %TaggedStruct addrspace(1)* null, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 0), !dbg !5
into
Initial selection DAG: %bb.13 'FastNewClosure:B15'
SelectionDAG has 90 nodes:
t0: ch = EntryToken
t2: i32,ch = CopyFromReg t0, Register:i32 %41, FastNewClosure.c:59
t4: i32 = add t2, Constant:i32<1069>, FastNewClosure.c:59
t7: i32,ch = load<(load 4 from %ir.67)> t0, t4, undef:i32, FastNewClosure.c:59
t9: i32,ch = CopyFromReg t0, Register:i32 %1, FastNewClosure.c:59
t11: i32 = AssertSext t9, ValueType:ch:i13, FastNewClosure.c:59
t12: i32 = add t2, t11, FastNewClosure.c:59
t13: i32,ch = load<(load 4 from %ir.70)> t0, t12, undef:i32, FastNewClosure.c:59
t15: i32 = add t13, Constant:i32<335>, FastNewClosure.c:59
t16: i32,ch = load<(load 4 from %ir.74)> t0, t15, undef:i32, FastNewClosure.c:59
t18: i32 = add t2, Constant:i32<10269>, FastNewClosure.c:59
t19: i32,ch = load<(load 4 from %ir.77)> t0, t18, undef:i32, FastNewClosure.c:59
t21: i32 = add t19, Constant:i32<63>, FastNewClosure.c:59
t28: i32,ch = CopyFromReg t0, Register:i32 %32, FastNewClosure.c:59
t26: ch = TokenFactor t7:1, t13:1, t16:1, t19:1, FastNewClosure.c:59
t31: ch,glue = callseq_start t26, TargetConstant:i32<0>, TargetConstant:i32<0>, FastNewClosure.c:59
t33: i32,ch = CopyFromReg t31, Register:i32 $sp, FastNewClosure.c:59
t35: ch,glue = CopyToReg t31, Register:i32 $r0, Constant:i32<2>, FastNewClosure.c:59
t37: ch,glue = CopyToReg t35, Register:i32 $r1, t7, t35:1, FastNewClosure.c:59
t39: ch,glue = CopyToReg t37, Register:i32 $r2, t21, t37:1, FastNewClosure.c:59
t25: i32,ch = CopyFromReg t0, Register:i32 %2, FastNewClosure.c:59
t41: ch,glue = CopyToReg t39, Register:i32 $r3, t25, t39:1, FastNewClosure.c:59
t43: ch,glue = CopyToReg t41, Register:i32 $r4, t16, t41:1, FastNewClosure.c:59
t45: ch,glue = CopyToReg t43, Register:i32 $r5, undef:i32, t43:1, FastNewClosure.c:59
t47: ch,glue = CopyToReg t45, Register:i32 $r6, undef:i32, t45:1, FastNewClosure.c:59
t49: ch,glue = CopyToReg t47, Register:i32 $r7, Constant:i32<0>, t47:1, FastNewClosure.c:59
t51: ch,glue = CopyToReg t49, Register:i32 $r8, undef:i32, t49:1, FastNewClosure.c:59
t53: ch,glue = CopyToReg t51, Register:i32 $r9, undef:i32, t51:1, FastNewClosure.c:59
t55: ch,glue = CopyToReg t53, Register:i32 $r10, undef:i32, t53:1, FastNewClosure.c:59
t57: ch,glue = CopyToReg t55, Register:i32 $r11, undef:i32, t55:1, FastNewClosure.c:59
t60: ch,glue = callseq_end t65, TargetConstant:i32<0>, TargetConstant:i32<0>, t65:1, FastNewClosure.c:59
t61: i32,ch,glue = CopyFromReg t60, Register:i32 $r0, t60:1, FastNewClosure.c:59
t65: ch,glue = STATEPOINT TargetConstant:i64<0>, TargetConstant:i32<8>, TargetConstant:i32<12>, TargetConstant:i32<0>, Register:i32 $r0, Register:i32 $r1, Register:i32 $r2, Register:i32 $r3, Register:i32 $r4, Register:i32 $r5, Register:i32 $r6, Register:i32 $r7, Register:i32 $r8, Register:i32 $r9, Register:i32 $r10, Register:i32 $r11, TargetConstant:i64<2>, TargetConstant:i64<97>, TargetConstant:i64<2>, TargetConstant:i64<0>, TargetConstant:i64<2>, TargetConstant:i64<0>, t19, t19, t28, t28, RegisterMask:Untyped, t57, t57:1, FastNewClosure.c:59
t66: i32 = Constant<-1>
t67: i32,ch = load<(load 4 from %ir.70)> t61:1, t12, undef:i32, FastNewClosure.c:59
t69: i32 = add t67, Constant:i32<339>, FastNewClosure.c:59
t70: i32,ch = load<(load 4 from %ir.88)> t61:1, t69, undef:i32, FastNewClosure.c:59
t71: ch = TokenFactor t67:1, t70:1, FastNewClosure.c:59
t72: ch,glue = callseq_start t71, TargetConstant:i32<0>, TargetConstant:i32<0>, FastNewClosure.c:59
t73: i32,ch = CopyFromReg t72, Register:i32 $sp, FastNewClosure.c:59
t74: ch,glue = CopyToReg t72, Register:i32 $r0, Constant:i32<2>, FastNewClosure.c:59
t75: ch,glue = CopyToReg t74, Register:i32 $r1, t7, t74:1, FastNewClosure.c:59
t76: ch,glue = CopyToReg t75, Register:i32 $r2, t21, t75:1, FastNewClosure.c:59
t77: ch,glue = CopyToReg t76, Register:i32 $r3, t28, t76:1, FastNewClosure.c:59
t78: ch,glue = CopyToReg t77, Register:i32 $r4, t70, t77:1, FastNewClosure.c:59
t79: ch,glue = CopyToReg t78, Register:i32 $r5, undef:i32, t78:1, FastNewClosure.c:59
t80: ch,glue = CopyToReg t79, Register:i32 $r6, undef:i32, t79:1, FastNewClosure.c:59
t81: ch,glue = CopyToReg t80, Register:i32 $r7, Constant:i32<0>, t80:1, FastNewClosure.c:59
t82: ch,glue = CopyToReg t81, Register:i32 $r8, undef:i32, t81:1, FastNewClosure.c:59
t83: ch,glue = CopyToReg t82, Register:i32 $r9, undef:i32, t82:1, FastNewClosure.c:59
t84: ch,glue = CopyToReg t83, Register:i32 $r10, undef:i32, t83:1, FastNewClosure.c:59
t85: ch,glue = CopyToReg t84, Register:i32 $r11, undef:i32, t84:1, FastNewClosure.c:59
t87: ch,glue = callseq_end t90, TargetConstant:i32<0>, TargetConstant:i32<0>, t90:1, FastNewClosure.c:59
t90: ch,glue = STATEPOINT TargetConstant:i64<1>, TargetConstant:i32<8>, TargetConstant:i32<12>, TargetConstant:i32<0>, Register:i32 $r0, Register:i32 $r1, Register:i32 $r2, Register:i32 $r3, Register:i32 $r4, Register:i32 $r5, Register:i32 $r6, Register:i32 $r7, Register:i32 $r8, Register:i32 $r9, Register:i32 $r10, Register:i32 $r11, TargetConstant:i64<2>, TargetConstant:i64<97>, TargetConstant:i64<2>, TargetConstant:i64<0>, TargetConstant:i64<2>, TargetConstant:i64<0>, RegisterMask:Untyped, t85, t85:1, FastNewClosure.c:59
t88: i32,ch,glue = CopyFromReg t87, Register:i32 $r0, t87:1, FastNewClosure.c:59
t91: ch = trap t88:1, FastNewClosure.c:59
t21 is reused in second statepoint without reload, for all the nodes are identical!
gc relocate uses copy and cause value merge
#7 relate to this bug.
In the function:StoreFastElementIC_GrowNoTransitionHandleCOW
generates the following code:
5ab79830: e2843003 add r3, r4, #3
...
5ab79868: e58d3040 str r3, [sp, #64] ; 0x40 spill in object offset
...
5ab79944: e59d3040 ldr r3, [sp, #64] ; 0x40
StoreFastElementIC_GrowNoTransitionHandleCOW.c:190
5ab79948: e3500000 cmp r0, #0
5ab7994c: 0a000004 beq 5ab79964 <StoreFastElementIC_GrowNoTransitionHandleCOW+0x4e4>
StoreFastElementIC_GrowNoTransitionHandleCOW.c:202
5ab79950: e2841003 add r1, r4, #3
StoreFastElementIC_GrowNoTransitionHandleCOW.c:197
5ab79954: e7932000 ldr r2, [r3, r0] use in object offset
StoreFastElementIC_GrowNoTransitionHandleCOW.c:198
5ab79958: e7812000 str r2, [r1, r0]
It's caused by Optimize machine instruction PHIs pass
which merges:
STATEPOINT 0, 4, 12, 0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, 2, 97, 2, 0, 2, 0, %1:gpr, %1:gpr, %824:gpr, %824:gpr, %820:gpr, %820:gpr, %821:gpr, %821:gpr, %817:gpr, %817:gpr, %819:gpr, %819:gpr, %818:gpr, %818:gpr, <regmask $lr $r11>, implicit-def $sp, implicit-def $r0, implicit-def $lr, debug-location !74; StoreFastElementIC_GrowNoTransitionHandleCOW.c:2338
ADJCALLSTACKUP 0, 0, 14, $noreg, implicit-def dead $sp, implicit $sp, debug-location !74; StoreFastElementIC_GrowNoTransitionHandleCOW.c:2338
%1500:gpr = COPY $r0, debug-location !74; StoreFastElementIC_GrowNoTransitionHandleCOW.c:2338
%39:gpr = COPY %1:gpr, debug-location !74; StoreFastElementIC_GrowNoTransitionHandleCOW.c:2338
...
%47:gpr = PHI %39:gpr, %bb.16, %1:gpr, %bb.15, debug-location !73; StoreFastElementIC_GrowNoTransitionHandleCOW.c:2337
%58:gpr = ADDri %47:gpr, 3, 14, $noreg, $noreg, debug-location !92; StoreFastElementIC_GrowNoTransitionHandleCOW.c:202
%58:gpr = ADDri %47:gpr, 3, 14, $noreg, $noreg, debug-location !92; StoreFastElementIC_GrowNoTransitionHandleCOW.c:202
into
%58:gpr = ADDri %1:gpr, 3, 14, $noreg, $noreg, debug-location !92; StoreFastElementIC_GrowNoTransitionHandleCOW.c:202
You successfully completed the dart to LLVM build project
You successfully completed the dart to LLVM build project ?
https://groups.google.com/a/dartlang.org/g/misc/c/9I2hypnR6BE
I have tried to add new ABI named "V8". And actually use the apcs ABI for vector and integer alignment. The performance regression occur.
I have tried to add new ABI named "V8". And actually use the apcs ABI for vector and integer alignment. The performance regression occur.
Originally posted by @linzj in #9 (comment)
Try to remove the hack code in lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
That stops the align neon vld1
Support safe points for c-calls
kV8CCMaxStackParameterToReg make an exception for builtins function, which is not expected
- if (stack_operands.size() <= kV8CCMaxStackParameterToReg) {
+ if ((stack_operands.size() <= kV8CCMaxStackParameterToReg) ||
+ !output().is_wasm()) {
It should not make exception.
Multiple uses of a code object make relative call fail to generate
Make LLVM add alignstack attribute to the function when vectorize pass change the function
RecordWrite builtin-function ignores the floatpoint save hint parameter
Review the implementation of root pointer points to constant memory region.
Duplicate of #[]()
Originally posted by @Emiliano978 in #9 (comment)
Statepoints with LLVM pushed parameters should adjust their offset when come to v8 code assemble phase
// TODO: This code should be commoned with the code for
// PATCHPOINT. There's no good reason for the difference in
// implementation other than historical accident. The only
// remaining difference is the unconditional use of the stack
// pointer as the base register.
if (MI.getOpcode() == TargetOpcode::STATEPOINT) {
assert((!MI.isDebugValue() || i == 0) &&
"Frame indicies can only appear as the first operand of a "
"DBG_VALUE machine instruction");
unsigned Reg;
MachineOperand &Offset = MI.getOperand(i + 1);
int refOffset = TFI->getFrameIndexReferencePreferSP(
MF, MI.getOperand(i).getIndex(), Reg, /*IgnoreSPUpdates*/ false);
=> Offset.setImm(Offset.getImm() + refOffset + SPAdj);
MI.getOperand(i).ChangeToRegister(Reg, false /isDef/);
continue;
}
It adds SPAdj, which is the number of bytes for stack parameters. Should remove its affect when comes to v8 code assembling phase. For v8 GC does not consider such an adjustment.
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