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why did you use a schottky diode (BAT46W), with just a Forward Continuous Current If=150 mA, while Vcell16 typically equal to 48V
and R18=100 ohm, wich cause a max current of 480mA ??

https://www.analog.com/media/en/analog-dialogue/volume-46/number-2/articles/optimize-high-current-sensing-accuracy.pdf This article of ADI provides some recommendation for a 4 point footprint for shunt. Would something like this be done in the next version?

Also based on thermal performance, a 5931 package SMD shunt might be better than a 3920 one?

Do you think that internal cell balancing with I_Balance ~= 65 mA is sufficient for most applications, and why ??
what about power dissipation and the resulting heat ?

We want to perform CAN bus testing with firmware at commit: 50b5bc5bdae9ee7609a8f9edb43ee9fb062481d9 for a custom board similar to 0.4v bms_c1.

The test document gives a brief description of the CAN bus testing. What are the steps to be followed for testing the CAN bus?

The ground loop around the IC can be improved.

the best would be to have a solid GND plane below the IC. This seems not to be easy.
An improvement could be to put TS3 signal to bottom layer. By this there is a solid connection of GND on top layer possible,
By slightly moving RST_SHUT and TEMP4 it is possible to add two additional vias in that area to connect the planes.

Add footprints for thermal jumpers such as 0612 variants of THJP series by Vishay? The footprints can be from the common drain points of the MOSFETs and send heat to their source planes as well. They can be populated if necessary for additional heat sinking.
This video by EEVBlog was where I got my insight into this interesting part.

Some options are

• Rohm's BD9G341 or BD9G500
• MIC28512 available in Mouser. 2A output capability may not be enough if you want to support power for driving contactors and also a cellular modem. There are higher rating Microchip parts but they aren't available.

In previous designs I usually used normal 2.54 mm pin-pitch headers for programming. However, it is often quite tricky to connect the pins correctly with jumper wires during testing and even more for re-flashing in the field during prototype evaluation.

As a solution, there is the Tag Connect, which is widely used in the industry. However, it's around 40€ for a simple cable, which is available from a single vendor only.

Würth offers a 2.54mm pitch press-fit connector, which can be used with standard ribbon cables. The connector can be mounted permanently or it can be used temporarily for flashing and debugging only (using slightly larger hole diameters). There is also a white-paper about use of this connector for debugging.

The connector is available e.g. via Digikey. I didn't look for compatible second sources, yet. However, also two normal 2.54 mm pin header rows could be soldered to the footprint to interface with jumper wires as a quick workaround if someone doesn't have the connector.

I suggest the following pinout:

A reset pin is not needed for SWD, as the MCU can be reset via the SWD interface itself. This leaves space for a serial interface for debugging in a 6-pin connector.

Let me know if there is a preference for a changed pinout. The boards are not ordered, yet.

CC @EarthLord

Hello, just curious to see if any thermal performance numbers have come up from any initial tests.

BQ76952 has 100 mA balancing current, relatively less. In any case, since the control board is small, just wanted to check if any rough thermal analysis was done on this matter?

This issue serves as a tracking issue for ongoing testing of the v0.3 hardware.

• USB serial communication
• UART serial communication
• I2C communication (see LibreSolar/bms-firmware#25)
• CAN communication (see also zephyrproject-rtos/zephyr#51100)
• Pre-discharge circuit (see also #36)
• Turn on/off MOSFETs
• Balancing
• BMS on/off button / connector
• Voltage measurement
• Current measurement
• Temperature measurement
• Thermal performance
• Fuse circuit

I do see two tracks running under Y1. I think it is possible to pull it a bit apart from the MCU to make sure there is no tracks beneath it.
I've read that the good practice is to have ground keepout under the crystal / resonator, with a ground island dedicated to the resonator and a via fence surrounding this ground island.
This helps protecting surrounding signals and prevent unwanted capacitance to disturb the crystal.
I would also suggest to have symmetrical tracks for Y1 to the MCU.

This is one of my most recent attempts at routing a crystal and taking these consideration into account.

aisler.net complains about this:

And indeed, one of those USB connector holes got electroplated, shorting 3V3 to GND.

I (hopefully) fixed my PCBs by drilling a slightly larger hole.

In file bq769x2_emul. c, The size defined by subcmd_mem seems to exceed the actual required size

/*
 * Memory layout of bq769x2 for direct commands and subcommands
 *
 * Used subcommand address space starts with 0x9180 and ends below 0x9400
 */
#define BQ_DIRECT_MEM_SIZE (0x80)
#define BQ_SUBCMD_MEM_SIZE (0x9400)

struct bq769x0_emul_data
{
    /* Memory of bq769x2 for direct commands */
    uint8_t direct_mem[BQ_DIRECT_MEM_SIZE];
    /* Memory of bq769x2 for subcommands / data */
    uint8_t subcmd_mem[BQ_SUBCMD_MEM_SIZE];
    uint32_t cur_reg;
};

Issue Description:

We are currently in the process of testing the BMS C1 board, specifically by subjecting it to overvoltage and undervoltage tests. The expected behavior during an overvoltage or undervoltage condition is that the voltage across the PACK+ and PACK- terminals should be 0V. To monitor this, we have employed an oscilloscope to probe TP4 (charge pin of BQ76952) and TP6 (discharge pin of BQ76952) on the board.

However, we have encountered an issue with the behavior of TP6 during undervoltage conditions. According to our expectations, TP6 should remain at 0V during an undervoltage condition, but we have observed that the voltage at TP6 is fluctuating instead of staying at a stable 0V. Simultaneously, TP4 exhibits the anticipated high voltage.

Steps to Reproduce:

1) Set up the BMS C1 board for undervoltage testing.
2) Monitor the voltage at TP6 using an oscilloscope.
3) Observe the fluctuating voltage at TP6 during the undervoltage condition.

Expected Behavior:

During an undervoltage condition, the voltage at TP6 should remain stable at 0V.

Actual Behavior:

The voltage at TP6 fluctuates instead of staying at a stable 0V.

Additional Information:

We have attached a snippet of the oscilloscope output when the probe is positioned at TP6 to provide a visual representation of the issue.

Attachment:

Environment:

Board: BMC C1. 
Oscilloscope model: KEYSIGHT EDUX1052A.
Testing conditions: Positive terminal of oscilloscope placed at TP6 and negative terminal connected to BAT-.

Impact:

This issue may affect the accuracy and reliability of the BMS C1 board's undervoltage protection, potentially leading to unintended consequences in real-world applications.

We kindly request assistance in investigating and resolving this issue to ensure the board's proper functionality under undervoltage conditions.

Labels: #testing #undervoltage

It exposed to battery voltage and should not be the usual 0603 50V type.

https://www.planetanalog.com/a-primer-on-battery-management-system-bms-for-evs/ This article talks about 0406 resistors instead of 1206 resistors for balancing heat dissipation. Just FYI.

Hi,

I have already checked the manual (I hope I have not overlooked anything, then sorry for that). I am not sure what the intention of the CHG+ pad in the PCB layout is. Obviously the port powers the I would call it "Predischarge circuit".
Is the exposed for the charger connection? Then why would I solder a cable onto a pad instead of using the power port connector like you did with BAT+, BAT-, PACK+ and PACK-.

Thank you!

hi all,

just a quick heads up to let everyone know that TI has got a small amount of stock of these ICs, its going quickly though.. and there is a limit of 50pcs

Hello @martinjaeger ,

When I connected the BMS, the LED kept flashing quickly. However, I reupload the software "west flash" command. It didn't fix the issue. Please nominal volts of the battery pack are reading the right value, which means the connection is correct.

Kindly assist.

Two Würth WP-BUCF power connectors are planned for Bat+ and Pack+ each. The possible issues with this are

• majorly the increase in cost for 2x of these costly connectors
• Lugs are designed in such a way that the bottom surface is made completely flat and thus provide max contact with terminal block. The 180 degree flip of one lug may not provide enough contact.
• Also depending on torquing of the screw, the resistance of connection would vary, thus not splitting the current in half.

An alternative would be to use one of 7461383 only such that it can handle all the current with its greater mating points with PCB and it is also sightly less expensive. For applications with vibrations it'll also be easier to apply thread lock glue.

If some space can be made at the corner of the PCB by moving the RJ45 connectors, M6 part also could be an option.

The creepage distance for the battery voltage is only 0.3mm to GND.
To reduce the risk of arcing, it makes sense to increase the distance to at least 0.7mm in respect to IPC9592.

On the connector this requires a change of the pinning to achieve the increased distance.

example:

In the PCB notes, we see the following text:

However, in the Board setup, the details are as follows:

Here the units are in mils, but when converted to um, we get:

105 um outer layers
35 um inner layers

Which is the right one?

Regards,
Selva.

Noise on the Vcc of 5V supplied devices should be better if the GND is connected on the output caps of the buck converter.
An additional 0603 100nF Cap on the output side could improve noise on the 5V.

For all the decoupling caps in the project, it would be good to have one or two via to GND in layer 2 to have low inductance from capacitor GND pad. This is as described in https://web.mst.edu/~jfan/slides/Archambeault1.pdf especially page 29

The protection Z-diodes and pulldown resistors might not help against transients, as they are not close to the gates of the Mosfets.
For the case that transients occur, it might make sense to have a second pair of z-diodes for the left side Fets.

Hey Martin,

4 layers clearly made a difference :)
May I suggest you to add some more GND vias to better stitch your 2 internal ground layers ?
You do have quite a lot of signals transitioning from top to bottom but the return path has to also find it's way between In1 and In2 to follow the signal. You do have some spare space under U3 IC to add some extra GND vias, and also under and around U4.
This way you will make sure that at medium frequency, the return path will still be on the right GND plane at the closest to your signal, both on the top and bottom side.

The TS2 / WAKE pin of the bq76952 is only pulled up during shutdown mode, but not during operation. Thus, the MCU cannot detect if the button is long-pressed to put the battery pack into sleep mode.

Even though the TS2 pin is a multi-purpose pin, it cannot be configured as an output, but only as a general purpose ADC input.

We need something like an additional external pull-up to the 3V3 rail.

I just realized that there's no provision for BAT+, CHG+ and PACK+ voltage measurement or did I miss it in some corner of the schematic? Or can BAT+ be measured independently by the BQ chipset?

C3 Mini module of ESP32 is chosen. Any reason for C3 vs say S2?

Stupid mistake: I forgot to break out the above pin to enter the serial bootloader.

It's not an issue for normal flashing via the USB port with built-in Serial/JTAG interface, but having it available is very helpful if something goes wrong and the bootloader has to be triggered manually.

Considering we can use 16s NMC cells too, it would be better to get the 64V or next higher Reverse Stand off Voltage Vr rated SMC TVS diode in bms-power-100a boards for D1 and D2.

Thanks for your great work, I would like to ask if I can do a proofing test now? Or do I need to wait for the next version to improve?

Just a couple of minor observations in file bms-c1.pdf - schematic for FET section. Page is numbered 7/5 as is the next page - page numbering needs reset.

More importantly, on page 7/5 - the section showing the FETs for reverse polarity and CHG signals, the note in the bottom left corner says the gate resistors is 470ohm and bases a calculation on this, while the schematic shows these are 47ohm, not 470ohm.

Hi,
I am trying to understand the significance of this P channel MOSFET (Q9) in the Power section of the BMS.

I want to understand it's significance in both charging and discharging condition. I made a Falstad simulation with 1 discharge N MOSFET (Q5) and the P MOSFET. Relevant switches can be used to put the simulation in Charging/Discharging mode.
Simulation is in this link.

Also, in case of charging, current flows through Q5 (disabled body diode) , but I am unable to understand how that N MOSFET is turned on. The Vgs and Vds doesn't make sense to me.

Should be TO-263 and not TO-252.

It looks like it doesn't have a solid copper pour beneath it to share the world its heat :)

Introduction:

Our aim was to conduct a thermal investigation of the BMS to determine how hot it gets at a current of 100 A or more.

Test Setup:

The picture below illustrates the BMS setup during the testing phase (with heatsink). The tests were performed without actual battery, as described here.

Used Devices:

• Power source: E/A Power Supply PSB 10750-120
• Sink: Deutronic xxx
• Temperature measurements: "TIM QVGA/HD" thermal imaging camera
• Linux & Windows Computer

Boundary Conditions:

• Ambient Temperature: ~24°C

Test Scenarios:

Three different scenarios were tested:

1. Without Heatsink:

   • Current: 100 A
   • Measured Temperature: ~91°C after 35 minutes
   • BMS Position: horizontally on the table
   • The thermal camera image below displays the temperature distribution upon concluding the test, highlighting the MOSFETs as the area of highest temperature.
   

2. With Heatsink (1):

   • Current: 100 A
   • Measured Temperature: ~49°C after 25 minutes
   • BMS Position: 5 cm above the table (floating, cooling fins facing down to the table)
   • The thermal camera image below displays the temperature distribution upon concluding the test, with the PCB layer of the shunt being the hottest area.
   

3. With Heatsink (2):

   • Current: 122 A
   • Measured Temperature: ~66°C after 4 hours
   • BMS Position: identical to Measurement 2
   • The thermal camera image below displays the temperature distribution upon concluding the test, with the PCB layer of the shunt being the hottest area.
   
   • Below graph shows the current profile, temperature rise of the internal sensors and thermal camera temperature areas over time (area 2: small rectangle, area 3: big rectangle).
   

Conclusion

The BMS can comfortably manage over 100 A while maintaining a temperature within an acceptable range.
If feasible, the PCB layer should have a thickness greater than 70 µm to minimize the heating around the shunt.
Further work could involve identifying the maximum current that results in a temperature of around 80°C.

Hello,

I simulated the reverse polarity protection circuit and it somehow doesn't work. There is a whole amount of current flowing over the DSG pin through the Schottky diode D16 with a reversed charger. A Texas Instrument application document shows this diode inverted. Is not the R51 68k resistor meant to drive the gates and the (then inverted) diode to turn off the discharge MOSFETs faster?

Then, if there is a reversed charger connected, voltage drops over the R51 68k resistor.

There are multiple options for the internal power supply of the BMS IC and the MCU. This issue collects some ideas and describes the current implementation.

The power supply has to fulfill the following features:

1. Not damage any parts of the circuit if the cells are connected before there is a solid GND connection through the BAT- wire.
2. The internal power supply shall not influence the cell voltage measurements (i.e. ideally not go through the balancing wires).
3. The system must go into a defined and safe state if the BAT+ wire is not connected (e.g. because the fuse between the BMS and the top-most cell is blown).

I have re-wired the cell connector such that there is an additional GND wire (also going to negative terminal of the first cell). This wire provides the GND connection for the BMS and is required according to the bq76952 datasheet (point 1 from above).

If the BAT+ pin is not connected, the MCU will currently not be powered and the bq76952 chip should stay in a low power mode. Other options would be to power only the MCU, but put it into a low power (emergency) mode, supplied from Cell 16+ through the balancing wire. There are some stuffing options and 0R resistors on the board for experimentation with different power supply paths.

The ESP32 offers a CAN 2.0B interface(up to 1Mbit/s), and you use the STM32G0B1 CAN(FD) interface (up to 15Mbit/s).
So, my question is: can i use the ESP32 CAN to command an E-scooter Motor Control Board for example, or a 1Mbit/s speed is not enough ?

Where can I find Kicad's library for those symbols, footprints, and 3D files?

What would be the plan for board to board connections? As I can see one would be for BMS <-> PDU and other would be for BMS <-> wireless communication board.
Is the plan to use direct board to board connection or with a cable, say FRC cable in between?

I do have a concern regarding the bottom tracks that kind of break your ground plane apart.
I understand the routing constraints here, as it is a 2 layer PCB, but you should consider adding more via stitching from top to bottom to permit return currents to cross this ground plane discontinuity.

Test on BMS carried out with mild success.

BMS powered through cell connectors - 3 cells used. We were even able to connect to it via BLE using the Thingset App.

However, when we connected the BAT - and then BAT +, the unit became non-responsive. The status LED lights are all off and the unit cannot be found on BLE. Tried the reset S2 and on/off S1 buttons in vain.

This MOSFET should use the Q_PMOS_GDS symbol instead of Q_PMOS_GSD to fix the pinout.

How do you estimate the charge pump capacitor value ?
416nF10=640nF

Can a split CAN termination be added with DNP marking so that there is an option to add this if needed

Two possible issue with this resistor

• 5% tolerance, although this can be mitigated by storing a calibration value in the MCU on manufacturing
• Using this resistor as a connection point for BAT- and PACK- would put quite a bit of mechanical stress on the resistor with lugs connection with 25 mm2 wires.

What value of resistance is planned to be used and is 3W power dissipation with the resistor enough?