git clone https://github.com/knknkn1162/verilog_template.git project_name
# exec make command on the project according to Makefile in the subdirectory.
make
git remote rename origin template
git remote add origin $git_project_url
# after (several) commit(s)
git push -u origin master-
The verilog compiler .. icarus verilog.
-
The default CI .. circle CI. The dashboard is here
| prefix | suffix | remarks | |
|---|---|---|---|
| input | i_ |
||
| output | o_ |
||
| wire | s_ |
||
| reg | s_ |
||
| n-clk delay | _$n |
||
| block in marco | _block |
NOT semicolon | |
| negative logic(btn etc.) | _n |
The general macros is included in macro directory for testbench.
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