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Segundo proyecto para el curso de Arquitectura de Computadores. La idea es hacer un ASIP (Application Specific Set Processor) que genere interpolación de imagen por medio de un compilador, código en ensamblador, un procesador pipeline y scripts en alto nivel.
Python 58.97%
SystemVerilog 34.58%
Stata 1.92%
HTML 4.52%
ce_architecture1.asip-image_interpolation's Introduction
Welcome to my github, I'm Jose David Sánchez Schnitzler!
Languages coding experience :
Python
Arduino
ARM (assembly language)
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Java
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