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License: Other
VHDL implementation of signal processing, control and communication associated with a single phase grid connected power supply
License: Other
create uart to communicate with fpga
Miss some sort of simulation framework/testbench. Any plan?
I have successfully compiled source code with GHDL and I have implemented the design with QuartusII Lite 20.1.1
The source\math_library\multiplier\simulation\sim_miltiplier.bat simulation batch seems not working in my case.
Setting of project_root variable doesn't work and it is not used anyway.
If I remove all unused or problematic stuff and keep it to the base bone, I still have issue with VCD.
I am working on a Windows 10 machine with GHDL/Gtkwave.
since the ethernet is managed, the mdio interface needs control
Rgmii ethernet transmitter is needed
it was noticed that the spi adc does not convert every time.
No known sure way to reproduce bug, following might trigger it
current state variable is actually just an integrator and a trigger mechanism is needed for it to be usable as a real state variable. Trigger should be added for the state variable
Initial test with uart suggests that the io sampling point is not correct as there is a lot of noise present in the measurement
code with multiple successive sequential_multiply calls does not function as intended. There seems to be a bug with code failing to prevent further multiplications to be pipelined when sequential_multiply is called.
Create initial project and set up build
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